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參數(shù)資料
| 型號(hào)： | LP2994M |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | DDR Termination Regulator |
| 中文描述： | BUS TERMINATOR SUPPORT CIRCUIT, PDSO8 |
| 封裝： | SOP-8 |
| 文件頁(yè)數(shù)： | 8/15頁(yè) |
| 文件大小： | 257K |
| 代理商： | LP2994M |
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Pin Descriptions
AVIN and PVIN
AVIN and PVIN are the input supply pins for the LP2994.
AVIN is used to supply all the internal control circuitry. PVIN,
however, is used exclusively to provide the rail voltage for
the output stage used to create V
. These pins have the
capability to work off separate supplies depending on the
application. Higher voltages on PVIN will increase the maxi-
mum continuous output current because of output RDSON
limitations at voltages close to V
. The disadvantage of high
values of PVIN is that the internal power loss will also
increase, thermally limiting the design. For SSTL-2 applica-
tions, a good compromise would be to connect the AVIN and
PVIN directly together at 2.5V. This eliminates the need for
bypassing the two supply pins separately. The only limitation
on input voltage selection is that PVIN must be equal to or
lower than AVIN.
V
DDQ
V
is the input used to create the internal reference
voltage for regulating V
. The reference voltage is gener-
ated from a resistor divider of two internal 50k
resistors.
This guarantees that V
will track V
/ 2 precisely. The
optimal implementation of V
is as a remote sense. This
can be achieved by connecting V
directly to the 2.5V rail
at the DIMM instead ofAVIN and PVIN. This ensures that the
reference voltage tracks the DDR memory rails precisely
without a large voltage drop from the power lines. For
SSTL-2 applications V
DDQ
will be a 2.5V signal, which will
create a 1.25V termination voltage at V
TT
(See Electrical
Characteristics Table for exact values of V
TT
over tempera-
ture).
V
SENSE
The purpose of the sense pin is to provide improved remote
load regulation. In most motherboard applications the termi-
nation resistors will connect to V
in a long plane. If the
output voltage was regulated only at the output of the
LP2994 then the long trace will cause a significant IR drop
resulting in a termination voltage lower at one end of the bus
than the other. The V
pin can be used to improve this
performance, by connecting it to the middle of the bus. This
will provide a better distribution across the entire termination
bus. If remote load regulation is not used then the V
pin must still be connected to V
. Care should be taken
when a long V
trace is implemented in close proximity
to the memory. Noise pickup in the V
SENSE
trace can cause
problems with precise regulation of V
TT
ramic capacitor placed next to the V
pin can help filter
any high frequency signals and preventing errors.
Shutdown
The LP2994 contains an active low shutdown pin that can be
used to tri-state VTT. During shutdown V
should not be
exposed to voltages that exceed PVIN. With the shutdown
pin asserted low the quiescent current of the LP2994 will
drop, however, V
DDQ
will always maintain its constant im-
pedance of 100k
for generating the internal reference.
Therefore to calculate the total power loss in shutdown both
currents need to be considered. For more information refer
to the Thermal Dissipation section. The shutdown pin also
has an internal pull-up current, therefore to turn the part on
the shutdown pin can either be connected to AVIN or left
open.
V
TT
V
is the regulated output that is used to terminate the bus
resistors. It is capable of sinking and sourcing current while
regulating the output precisely to V
/ 2. The LP2994 is
designed to handle peak transient currents of up to +/- 3A
with excellent load regulation. The maximum continuous
current is a function of AVIN and PVIN and several curves
can be seen in the Typical Performance Characteristics sec-
tion. If a transient is expected to last above the maximum
continuous current rating for a significant amount of time,
then the bulk output capacitor should be sized large enough
to prevent an excessive voltage drop. Despite the fact that
the LP2994 is designed to handle large transient output
currents it is not capable of handling these for long durations
under all conditions. The reason for this is that the SO-8
package is not able to thermally dissipate an infinite amount
of heat as a result of internal power loss. If large currents are
required for longer durations, then care should be taken to
ensure that the maximum junction temperature is not ex-
ceeded. Proper thermal de-rating should always be used
(Please refer to the Thermal Dissipation section).
Component Selection
Input Capacitor
The LP2994 does not require a capacitor for input stability,
but it is recommended for improved performance during
large load transients to prevent the input rail from dropping.
The input capacitor should be located as close as possible to
the PVIN pin. Several recommendations exist dependent on
the application required.Atypical value recommended forAL
electrolytic capacitors is 47uF. Ceramic capacitors can also
be used, a value in the range of 10uF with X5R dielectric or
better would be an ideal choice. The input capacitance can
be reduced if the LP2994 is placed close to the bulk capaci-
tance from the output of the 2.5V DC-DC converter. If the two
supply rails (AVIN and PVIN) are separated then the 47uF
capacitor should be placed as close to possible to the PVIN
rail. An additional 0.1uF ceramic capacitor can be placed on
the AVIN rail to prevent excessive noise from coupling into
the device.
Output Capacitor
The LP2994 has been designed to be insensitive of output
capacitor size or ESR (Equivalent Series Resistance). This
allows the flexibility to use any capacitor desired. The choice
for output capacitor will be determined solely on the applica-
tion and the requirements for load transient response of VTT.
As a general recommendation, the output capacitor should
be sized above 100uF with a low ESR for SSTL applications
with DDR-SDRAM. The value of ESR should be determined
by the maximum current spikes expected and the extent at
which the output voltage is allowed to droop. Several capaci-
tor options are available on the market and a few of these
are highlighted below:
AL - It should be noted that many aluminum electrolytics only
specify impedance at a frequency of 120Hz, which indicates
they have poor high frequency performance. Only aluminum
electrolytics that have an impedance specified at a higher
frequency (approximately 100kHz) should be used for the
LP2994. To improve the ESR several AL electrolytics can be
combined in parallel for an overall reduction. An important
note to be aware of is the extent at which the ESR will
change over temperature. Aluminum electrolytic capacitors
can have their ESR rapidly increase at cold temperatures.
Ceramic - Ceramic capacitors typically have a low capaci-
tance, in the range of 10 to 100uF range, but they have
excellent AC performance for bypassing noise because of
very low ESR (typically less than 10mOhm). However, some
L
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相關(guān)代理商/技術(shù)參數(shù) |
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| LP2994M/NOPB | 功能描述:IC DDR TERMINATION REG 8SOIC RoHS:是 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - 專用型 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,000 系列:- 應(yīng)用:電源，ICERA E400，E450 輸入電壓:4.1 V ~ 5.5 V 輸出數(shù):10 輸出電壓:可編程 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:42-WFBGA，WLCSP 供應(yīng)商設(shè)備封裝:42-WLP 包裝:帶卷 (TR) |
| LP2994M/NOPB | 制造商:Texas Instruments 功能描述:Linear Voltage Regulator IC |
| LP2994MX/NOPB | 功能描述:IC REGULATOR DDR TERM 8-SOIC RoHS:是 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - 專用型 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,000 系列:- 應(yīng)用:電源，ICERA E400，E450 輸入電壓:4.1 V ~ 5.5 V 輸出數(shù):10 輸出電壓:可編程 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:42-WFBGA，WLCSP 供應(yīng)商設(shè)備封裝:42-WLP 包裝:帶卷 (TR) |
| LP2995LQ | 功能描述:低壓差穩(wěn)壓器 - LDO RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動(dòng)電壓（最大值）:307 mV 輸出電流:1 A 負(fù)載調(diào)節(jié):0.3 % 輸出端數(shù)量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-20 |
| LP2995LQ/7002047 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Texas Instruments 功能描述: |
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