參數(shù)資料
型號(hào): LP2994MX
廠(chǎng)商: NATIONAL SEMICONDUCTOR CORP
元件分類(lèi): 通用總線(xiàn)功能
英文描述: DDR Termination Regulator
中文描述: BUS TERMINATOR SUPPORT CIRCUIT, PDSO8
封裝: SOP-8
文件頁(yè)數(shù): 10/15頁(yè)
文件大?。?/td> 257K
代理商: LP2994MX
Typical Application Circuits
Several different application circuits have been shown in
Figure 4 through Figure 13 to illustrate some of the options
that are possible in configuring the LP2994. Graphs of the
individual circuit performance can be found in the Typical
Performance Characteristics section in the beginning of the
datasheet. These curves illustrate how the maximum output
current is affected by changes in AVIN and PVIN.
SSTL-2 Applications
For the majority of applications that implement the SSTL-2
termination scheme, it is recommended to connect all the
input rails to the 2.5V rail. This provides an optimal trade-off
between power dissipation and component count and selec-
tion. An example of this circuit can be seen in Figure 4
If power dissipation or efficiency is a major concern then the
LP2994 has the ability to operate on split power rails. The
output stage (PVIN) can be operated on a lower rail such as
1.8V and the analog circuitry (AVIN) can be connected to a
higher rail such as 2.5V, 3.3V or 5V. This allows the internal
power dissipation to be lowered when sourcing current from
VTT. The disadvantage of this circuit is that the maximum
continuous current is reduced because of the lower rail
voltage, although it is adequate for all motherboard SSTL-2
applications. Increasing the output capacitance can also
help if periods of large load transients will be encountered.
The third option for SSTL-2 applications in the situation that
a 1.8V rail is not available and it is not desirable to use 2.5V,
is to connect the LP2994 power rail to 3.3V. In this situation
AVIN will be limited to operation on the 3.3V or 5V rail as
PVIN can never exceed AVIN. This configuration has the
ability to provide the maximum continuous output current at
the downside of higher thermal dissipation. Care should be
taken to prevent the LP2994 from experiencing large current
levels which cause the junction temperature to exceed the
maximum. Because of this risk it is not recommended to
supply the output stage with a voltage higher than a nominal
3.3V rail.
20045904
FIGURE 4. Recommended SSTL-2 Implementation
20045905
FIGURE 5. Lower Power Dissipation SSTL-2 Implementation
L
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