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參數(shù)資料
| 型號： | LP3964EMP-3.3 |
| 元件分類： | 基準(zhǔn)電壓源/電流源 |
| 英文描述： | THREE-TERMINAL POSITIVE FIXED VOLTAGE REGULATORS |
| 中文描述： | 三端固定電壓調(diào)節(jié)器 |
| 文件頁數(shù)： | 8/22頁 |
| 文件大?。?/td> | 479K |
| 代理商： | LP3964EMP-3.3 |
Electrical Characteristics
LP3961/LP3964
(Continued)
Limits in standard typeface are for T
J
= 25C, and limits in
boldface type
apply over the
full operating temperature range
.
Unless otherwise specified: V
IN
= V
O(NOM)
+ 1V, I
L
= 10 mA, C
OUT
= 33μF, V
SD
= V
IN
-0.3V.
Symbol
Parameter
Conditions
Typ
(Note 4)
LP3961/4
(Note 5)
Min
Units
Max
T
dOFF
T
dON
I
SD
Turn-off delay
Turn-on delay
SD Input Current
I
L
= 800 mA
I
L
= 800 mA
V
SD
= V
IN
20
25
1
μs
μs
nA
ERROR FLAG COMPARATOR
V
T
V
TH
V
EF(Sat)
Td
I
lk
Threshold
Threshold Hysteresis
Error Flag Saturation
Flag Reset Delay
Error Flag Pin Leakage
Current
Error Flag Pin Sink
Current
(Note 9)
(Note 9)
I
sink
= 100μA
10
5
0.02
1
1
5
2
16
8
0.1
%
%
V
μs
nA
I
max
V
Error
=
0.5V
(over temp.)
1
mA
AC PARAMETERS
PSRR
Ripple Rejection
V
IN
= V
OUT
+ 1.5V
C
OUT
= 100uF
V
OUT
= 3.3V
V
IN
= V
OUT
+ 0.3V
C
OUT
= 100uF
V
OUT
= 3.3V
f = 120Hz
BW = 10Hz – 100kHz
BW = 300Hz – 300kHz
60
dB
40
ρ
n(l/f
Output Noise Density
Output Noise Voltage
(rms)
0.8
150
100
μV
e
n
μV (rms)
Note 1:
Absolute maximum ratings indicate limits beyond which damage to the device may occur. Operating ratings indicate conditions for which the device is
intended to be functional, but does not guarantee specific performance limits. For guaranteed specifications and test conditions, see Electrical Charateristics. The
guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed
test conditions.
Note 2:
At elevated temperatures, devices must be derated based on package thermal resistance. The devices in TO220 package must be derated at
θ
jA
= 50C/W
(with 0.5in
, 1oz. copper area), junction-to-ambient (with no heat sink). The devices in the TO263 surface-mount package must be derated at
θ
= 60C/W (with
0.5in
, 1oz. copper area), junction-to-ambient. The devices in SOT223 package must be derated at
θ
jA
= 90C/W (with 0.5in
, 1oz. copper area), junction-to-ambient.
Note 3:
The human body model is a 100pF capacitor discharged through a 1.5k
resistor into each pin.
Note 4:
Typical numbers are at 25C and represent the most likely parametric norm.
Note 5:
Limits are 100% production tested at 25C. Limits over the operating temperature range are guaranteed through correlation using Statistical Quality Control
(SQC) methods. The limits are used to calculate National’s Average Outgoing Quality Level (AOQL).
Note 6:
If used in a dual-supply system where the regulator load is returned to a negative supply, the LP396X output must be diode-clamped to ground.
Note 7:
The output PMOS structure contains a diode between the V
and V
terminals. This diode is normally reverse biased. This diode will get forward biased
if the voltage at the output terminal is forced to be higher than the voltage at the input terminal. This diode can typically withstand 200mA of DC current and 1Amp
of peak current.
Note 8:
Output voltage line regulation is defined as the change in output voltage from the nominal value due to change in the input line voltage. Output voltage load
regulation is defined as the change in output voltage from the nominal value due to change in load current. The line and load regulation specification contains only
the typical number. However, the limits for line and load regulation are included in the output voltage tolerance specification.
Note 9:
Error Flag threshold and hysteresis are specified as percentage of regulated output voltage.
Note 10:
Dropout voltage is defined as the minimum input to output differential voltage at which the output drops 2% below the nominal value. Dropout voltage
specification applies only to output voltages of 2.5V and above. For output voltages below 2.5V, the drop-out voltage is nothing but the input to output differential,
since the minimum input voltage is 2.5V.
Note 11:
This specification has been tested for 40C
≤
T
J
≤
85C since the temperature rise of the device is negligible under shutdown conditions.
Note 12:
The minimum operating value for V
IN
is equal to either [V
OUT(NOM)
+ V
DROPOUT
] or 2.5V, whichever is greater.
L
www.national.com
8
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LP3964EMP-5.0 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:800mA Fast Ultra Low Dropout Linear Regulators |
| LP3964EMP-5.0/NOPB | 功能描述:IC REG LDO 5V .8A SOT223-5 RoHS:是 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - 線性 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 穩(wěn)壓器拓?fù)浣Y(jié)構(gòu):正，固定式 輸出電壓:4V 輸入電壓:最高 16V 電壓 - 壓降（標(biāo)準(zhǔn)）:0.28V @ 150mA 穩(wěn)壓器數(shù)量:1 電流 - 輸出:150mA 電流 - 限制（最?。?- 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:5-VFBGA 供應(yīng)商設(shè)備封裝:5-uSMD 包裝:Digi-Reel® 其它名稱:LP2985AIBP-4.0DKR |
| LP3964EMP-ADJ | 功能描述:低壓差穩(wěn)壓器 - LDO RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動(dòng)電壓（最大值）:307 mV 輸出電流:1 A 負(fù)載調(diào)節(jié):0.3 % 輸出端數(shù)量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-20 |
| LP3964EMP-ADJ | 制造商:Texas Instruments 功能描述:IC REG ADJ SMD 3964 SOT-223-5 |
| LP3964EMP-ADJ/NOPB | 功能描述:低壓差穩(wěn)壓器 - LDO 800Ma Ultra-LDO RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動(dòng)電壓（最大值）:307 mV 輸出電流:1 A 負(fù)載調(diào)節(jié):0.3 % 輸出端數(shù)量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-20 |
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