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參數(shù)資料
| 型號： | LP3997MMX-3.3 |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 基準(zhǔn)電壓源/電流源 |
| 英文描述： | Micropower 250mA CMOS LDO Regulator with Error Flag / Power-On-Reset |
| 中文描述： | 3.3 V FIXED POSITIVE LDO REGULATOR, 0.4 V DROPOUT, PDSO8 |
| 封裝： | MSOP-8 |
| 文件頁數(shù)： | 9/11頁 |
| 文件大?。?/td> | 279K |
| 代理商： | LP3997MMX-3.3 |
Applications Information
External Capacitors
In common with most regulators, the LP3997 requires exter-
nal capacitors for regulator stability. The LP3990 is specifi-
cally designed for portable applications requiring minimum
board space and smallest components. These capacitors
must be correctly selected for good performance.
V
IN
An input capacitor is required for stability. It is recommended
that a minimum of 1.0μF capacitor is connected between the
LP3997 input pin and ground (this capacitance value may be
increased without limit).
This capacitor must be located a distance of not more than
1cm from the input pin and returned to a clean analogue
ground.Any good quality ceramic, tantalum, or film capacitor
may be used at the input.
Important:
Tantalum capacitors can suffer catastrophic fail-
ures due to surge current when connected to a low-
impedance source of power (like a battery or a very large
capacitor). If a tantalum capacitor is used at the input, it must
be guaranteed by the manufacturer to have a surge current
rating sufficient for the application.
There are no requirements for the ESR (Equivalent Series
Resistance) on the input capacitor, but tolerance and tem-
perature coefficient must be considered when selecting the
capacitor to ensure the capacitance will remain
)
1.0μF over
the entire operating temperature range.
V
OUT
V
OUT
is the output voltage of the regulator. Connect capaci-
tor (minimum 1.0μF) to ground form this pin. To ensure
stabilty the capacitor must meet the minimum value for
capcitance and have an ESR in the range 5mW to 500mW.
Ceramic X7R types are recommended.
SENSE or ADJUST
SENSE is used to sense the output voltage. Connect sense
to V
OUT
for fixed voltage version.
SHUTDOWN
SD controls the turning on and off of the LP3997. V
is
guaranteed to be on when the voltage on the /SD pin is
greater than 0.95V. V
is guaranteed to be off when the
voltage on the SD pin is less than 0.4V.
ERROR
ERROR is an open drain output which is set low when V
is more than 5% below its nominal value. An external pull up
resistor is required on this pin. When a capacitor is con-
nected from DELAY to GROUND, the error signal is delayed
(see DELAY section). This delayed error signal can be used
as the power-on reset signal for the application system. The
ERROR pin is disconnected when not used.
DELAY
A capacitor from DELAY to GROUND sets the time delay for
ERROR changing from low to high state. The delay time is
set by the following formula.
20092905
V
TH(DELAY)
is nominally 1.2V.
The DELAY pin should be open circuit if not used.
C
NOISE
For low noise application, connect a high frequency ceramic
capacitor from C
to ground, A 0.01μF to 0.1μF X5R or
X7R is recommended. This capacitor is connected directly to
high impedence node in the band gap reference circuit. Any
significant loading on this node will cause a change in the
regulated output voltage. For theis reason, DC leakage cur-
rent from this pin must be kept as low as possible for best
output voltage accuracy.
CAPACITOR CHARACTERISTICS
The LP3997 is designed to work with ceramic capacitors on
the output to take advantage of the benefits they offer: for
capacitance values in the range of 1μF to 4.7μF range,
ceramic capacitors are the smallest, least expensive and
have the lowest ESR values (which makes them best for
eliminating high frequency noise). The ESR of a typical 1μF
ceramic capacitor is in the range of 20 m
to 40 m
, which
easily meets the ESR requirement for stability by the
LP3985.
For both input and output capacitors careful interpretation of
the capacitor specification is required to ensure correct de-
vice operation. The capacitor value can change greatly de-
pendant on the conditions of operation and capacitor type.
In particular the output capacitor selection should take ac-
count of all the capacitor parameters to ensure that the
specification is met within the application. Capacitance value
can vary with DC bias conditions as well as temperature and
frequency of operation. Capacitor values will also show
some decrease over time due to aging. The capacitor pa-
rameters are also dependant on the particular case size with
smaller sizes giving poorer performance figures in general.
As an example
Figure 1
shows a typical graph showing a
comparison of capacitor case sizes in a Capacitance vs. DC
Bias plot. As shown in the graph, as a result of the DC Bias
condition the capacitance value may drop below the mini-
mum capacitance value given in the recommended capacitor
table (0.7μF in this case). Note that the graph shows the
capacitance out of spec for the 0402 case size capacitor at
higher bias voltages. It is therefore recommended that the
capacitor manufacturers’ specifications for the nominal value
capacitor are consulted for all conditions as some capacitor
sizes (e.g. 0402) may not be suitable in the actual applica-
tion.
L
www.national.com
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