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參數(shù)資料
| 型號(hào)： | LP61L1008 |
| 廠商： | AMIC Technology Corporation |
| 英文描述： | 128K X 8 BIT 3.3V HIGH SPEED CENTER POWER CMOS SRAM |
| 中文描述： | 128K的× 8位高速3.3V的中心功耗CMOS SRAM |
| 文件頁(yè)數(shù)： | 9/13頁(yè) |
| 文件大?。?/td> | 142K |
| 代理商： | LP61L1008 |
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LP61L1008 Series
(June, 2001, Version 2.0)
8
AMIC Technology, Inc.
Timing Waveforms (continued)
Write Cycle 2
(Chip Enable Controlled)
t
WC
Address
CE
D
IN
t
DH
t
DW
(4)
t
CW5
t
AW
t
WR3
WE
D
OUT
t
WHZ7
t
WP2
t
CW5
t
AS1
Notes: 1. t
AS
is measured from the address valid to the beginning of Write.
2. A Write occurs during the overlap (t
WP
) of a low CE and a low WE .
3. t
WR
is measured from the earliest of CE or WE going high to the end of the Write cycle.
4. If the CE low transition with the WE low transition or after the WE transition, outputs remain in a high
impedance state.
5. t
CW
is measured from the later of CE going low to the end of Write.
6. OE is continuously low. (OE = V
IL
)
7. Transition is measured
±
500mV from steady state. This parameter is sampled and not 100% tested.
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相關(guān)代理商/技術(shù)參數(shù) |
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| LP61L1008A | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:128K X 8 BIT 3.3V HIGH SPEED CENTER POWER CMOS SRAM |
| LP61L1008AS-10 | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:128K X 8 BIT 3.3V HIGH SPEED CENTER POWER CMOS SRAM |
| LP61L1008AS-12 | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:128K X 8 BIT 3.3V HIGH SPEED CENTER POWER CMOS SRAM |
| LP61L1008AS-8 | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:128K X 8 BIT 3.3V HIGH SPEED CENTER POWER CMOS SRAM |
| LP61L1008S-12 | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:128K X 8 BIT 3.3V HIGH SPEED CENTER POWER CMOS SRAM |
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