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參數(shù)資料
| 型號(hào)： | LP621024DX-55LL |
| 廠商： | AMIC Technology Corporation |
| 英文描述： | 128K X 8 BIT CMOS SRAM |
| 中文描述： | 128K的× 8位CMOS的SRAM |
| 文件頁數(shù)： | 7/16頁 |
| 文件大?。?/td> | 183K |
| 代理商： | LP621024DX-55LL |
LP621024D Series
(August, 2001, Version 1.0)
7
AMIC Technology, Inc.
Timing Waveforms (continued)
Read Cycle 4
(1)
t
RC
Address
CE2
D
OUT
t
AA
t
OE
t
OLZ5
t
ACE1
t
CLZ15
t
ACE2
t
CLZ25
t
CHZ25
t
OHZ5
t
CHZ15
t
OH
OE
CE1
Notes: 1. WE is high for Read Cycle.
2. Device is continuously enabled CE1 = V
IL
and CE2 = V
IH
.
3. Address valid prior to or coincident with CE1 transition low.
4. OE = V
IL
.
5. Transition is measured
±
500mV from steady state. This parameter is sampled and not 100% tested.
6. CE2 is high.
7. CE1 is low.
8. Address valid prior to or coincident with CE2 transition high.
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| LP621024DM-70LLT | 128K X 8 BIT CMOS SRAM |
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| LP62E16512U-70LLI | Shielded Paired Cable; Number of Conductors:4; Conductor Size AWG:24; No. Strands x Strand Size:7 x 32; Jacket Material:Polyvinylchloride (PVC); Number of Pairs:2; Impedance:75ohm; Leaded Process Compatible:Yes; Voltage Nom.:300V RoHS Compliant: Yes |
| LP62E16512U-70LLT | Shielded Paired Cable; Number of Conductors:2; Jacket Material:Polyvinylchloride (PVC); Number of Pairs:1; Leaded Process Compatible:Yes RoHS Compliant: Yes |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LP621024DX-55LLI | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:128K X 8 BIT CMOS SRAM |
| LP621024DX-55LLT | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:128K X 8 BIT CMOS SRAM |
| LP621024DX-70LL | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:128K X 8 BIT CMOS SRAM |
| LP621024DX-70LLI | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:128K X 8 BIT CMOS SRAM |
| LP621024DX-70LLT | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:128K X 8 BIT CMOS SRAM |
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