參數(shù)資料
型號(hào): LP62S16512-I
廠商: AMIC Technology Corporation
英文描述: 512K X 16 BIT LOW VOLTAGE CMOS SRAM
中文描述: 為512k × 16位低電壓CMOS的SRAM
文件頁(yè)數(shù): 2/14頁(yè)
文件大?。?/td> 150K
代理商: LP62S16512-I
LP62S16512-I Series
Preliminary
512K X 16 BIT LOW VOLTAGE CMOS SRAM
Features
PRELIMINARY
(March, 2002, Version 0.2)
2
AMIC Technology, Inc.
n
Operating voltage: 2.7V to 3.6V
n
Access times: 55/70 ns (max.)
n
Current:
Very low power version: Operating: 50mA (max.)
n
Full static operation, no clock or refreshing required
n
All inputs and outputs are directly TTL-compatible
n
Common I/O using three-state output
n
Data retention voltage: 2.0V (min.)
n
Available in 48-ball CSP (8
×
10mm) packages
Standby:
20
μ
A (max.)
General Description
The LP62S16512-I is a low operating current 8,388,608-
bit static random access memory organized as 524,288
words by 16 bits and operates on low power voltage from
2.7V to 3.6V. It is built using AMIC's high performance
CMOS process.
Inputs and three-state outputs are TTL compatible and
allow for direct interfacing with common system bus
structures.
Two chip enable input is provided for POWER-DOWN,
device enable. Two byte enable inputs and an output
enable input are included for easy interfacing.
Data retention is guaranteed at a power supply voltage
as low as 2.0V.
Product Family
Power Dissipation
Standby
(I
SB1
, Typ.)
Product
Family
Operating
Temperature
VCC
Range
Speed
Data Retention
(I
CCDR
, Typ.)
Operating
(I
CC2
, Typ.)
Package
Type
LP62S16512
-40
°
C ~ +85
°
C
2.7V~3.6V
55ns / 70ns
0.3
μ
A
0.5
μ
A
4mA
48 CSP
1. Typical values are measured at VCC = 3.0V, T
A
= 25
°
C and not 100% tested.
2. Data retention current VCC = 2.0V.
Pin Configurations
n
CSP (Chip Size Package)
48-pin Top View
I/O
9
I/O
10
GND
VCC
I/O
15
I/O
16
A18
A8
NC
A9
A12
A10
A11
NC
A13
A14
A15
I/O
8
I/O
7
I/O
3
I/O
1
GND
VCC
A0
A3
A5
A6
A4
A1
A2
CS
2
6
5
4
3
2
1
A
B
C
D
E
F
G
H
I/O
14
I/O
13
I/O
12
I/O
11
A17
NC
A7
A16
I/O
2
I/O
4
I/O
5
I/O
6
LB
HB
WE
OE
CS
1
相關(guān)PDF資料
PDF描述
LP62S16512-T 512K X 16 BIT LOW VOLTAGE CMOS SRAM
LP62S16512U-55LLI Shielded Paired Cable; Number of Conductors:2; Conductor Size AWG:24; No. Strands x Strand Size:7 x 32; Jacket Material:Polyvinylchloride (PVC); Shielding Material:Aluminum Foil/Polyester Tape; Number of Pairs:1 RoHS Compliant: Yes
LP62S16512U-55LLT Shielded Paired Cable; Number of Conductors:2; Conductor Size AWG:24; No. Strands x Strand Size:7 x 32; Jacket Material:Polyvinylchloride (PVC); Number of Pairs:1; Impedance:75ohm; Voltage Nom.:600V RoHS Compliant: Yes
LP62S16512U-70LLI Shielded Paired Cable; Number of Conductors:2; Jacket Material:Polyvinylchloride (PVC); Number of Pairs:1; Leaded Process Compatible:Yes RoHS Compliant: Yes
LP62S16512U-70LLT CABLE, 9502, 2PAIR, 30.5M; Cores, No. of:4; Conductor make-up:7/32AWG; Area, conductor CSA:0.2mm2; Diameter, External:5.64m; Material, secondary insulation:PVC; Length, Reel (Imperial):100ft; Colour, secondary insulation:Chrome; RoHS Compliant: Yes
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
LP62S16512-T 制造商:AMICC 制造商全稱(chēng):AMIC Technology 功能描述:512K X 16 BIT LOW VOLTAGE CMOS SRAM
LP62S16512U-55LLI 制造商:AMICC 制造商全稱(chēng):AMIC Technology 功能描述:512K X 16 BIT LOW VOLTAGE CMOS SRAM
LP62S16512U-55LLT 制造商:AMICC 制造商全稱(chēng):AMIC Technology 功能描述:512K X 16 BIT LOW VOLTAGE CMOS SRAM
LP62S16512U-70LLI 制造商:AMICC 制造商全稱(chēng):AMIC Technology 功能描述:512K X 16 BIT LOW VOLTAGE CMOS SRAM
LP62S16512U-70LLT 制造商:AMICC 制造商全稱(chēng):AMIC Technology 功能描述:512K X 16 BIT LOW VOLTAGE CMOS SRAM