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參數(shù)資料
| 型號： | LP62S1664CV-55LLI |
| 廠商： | AMIC Technology Corporation |
| 英文描述： | 64K X 16 BIT LOW VOLTAGE CMOS SRAM |
| 中文描述： | 64K的× 16位低電壓CMOS的SRAM |
| 文件頁數(shù)： | 8/15頁 |
| 文件大?。?/td> | 148K |
| 代理商： | LP62S1664CV-55LLI |
LP62S1664C Series
PRELIMINARY
(February, 2002, Version 0.0)
7
AMIC Technology, Inc.
Timing Waveforms
Read Cycle 1
(1, 2, 4)
t
RC
t
OH
t
AA
t
OH
Address
D
OUT
Read Cycle 2
(1, 2, 3)
t
RC
t
AA
Address
t
ACE
t
CHZ
5
CE
HB, LB
t
BHZ
5
OE
t
CLZ
5
t
BE
t
BLZ
5
t
OE
t
OLZ
5
t
OHZ
5
D
OUT
Notes: 1. WE is high for Read Cycle.
2. Device is continuously enabled CE = V
IL
, HB = V
IL
and, or LB = V
IL
.
3. Address valid prior to or coincident with CE and (HB and, or LB ) transition low.
4. OE = V
IL
.
5. Transition is measured
±
500mV from steady state. This parameter is sampled and not 100% tested.
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| LP62S1664CV-55LLT | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:64K X 16 BIT LOW VOLTAGE CMOS SRAM |
| LP62S1664CV-70LLI | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:64K X 16 BIT LOW VOLTAGE CMOS SRAM |
| LP62S1664CV-70LLT | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:64K X 16 BIT LOW VOLTAGE CMOS SRAM |
| LP62S2048A-I | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:256K X 8 BIT LOW VOLTAGE CMOS SRAM |
| LP62S2048AM-55LLI | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:256K X 8 BIT LOW VOLTAGE CMOS SRAM |
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