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參數(shù)資料
| 型號： | LP8358MFX-1.2 |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 基準(zhǔn)電壓源/電流源 |
| 英文描述： | 150mA, UCap, Low Dropout Voltage Regulator with Power Good |
| 中文描述： | 1.2 V FIXED POSITIVE LDO REGULATOR, PDSO5 |
| 封裝： | SOT-23, 5 PIN |
| 文件頁數(shù)： | 4/10頁 |
| 文件大?。?/td> | 508K |
| 代理商： | LP8358MFX-1.2 |
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
(Note 1)
ESD Tolerance (Note 2)
Human Body Model
Junction Temperature
V
IN
, V
OUT
, V
EN
Soldering Information
Infrared or Convection (20 sec)
Wave Soldering (10 sec)
2000V
150C
0.3 TO 6.5V
235C
260C (lead temp)
Operating Ratings
Supply Voltages
V
IN
V
EN
Junction Temp. Range (Note 3)
Storage Temperature Range
Package Themal Resistance
SOT23-5
2.7V to 6V
0V to V
IN
40C to +125C
65C to 150C
235C/W
Electrical Characteristics
Unless otherwise specified, all limits guaranteed for T
= 25C, V
= 2.7V, I
L
= 100μA, C
OUT
= 1μF, V
EN
≥
2.0V.
Boldface
limits apply over the entire operating temperature range, 40C to 125C.
Symbol
Parameter
Conditions
Min
(Note 5)
-3
-4
0.3
Typ
(Note 4)
Max
(Note 5)
3
4
0.3
4
1
180
Units
V
O
Output Voltage Accuracy
I
L
= 100μA
%
V
O
/V
O
V
O
/V
O
I
Q
I
GND
Line Regulation
Load Regulation
Quiescent Current
Ground Pin Current (Note 5)
V
IN
= 2.7V to 6V
I
L
= 0.1mA to 150mA (Note 6)
V
EN
≤
0.4V (Shutdown), PG = NC
I
L
= 0mA, V
EN
≥
2.0V (active),
V
IN
= 6V
I
L
= 150mA, V
EN
≥
2.0V (active),
V
IN
= 6V
f = 120Hz, C
OUT
= 4.7μF,
I
L
= 150mA
V
OUT
= 0V
%
%
μA
μA
1
0.01
120
160
225
PSRR
Power Supply Rejection
Ratio
Current Limit
62
dB
I
LIMIT
Thermal Protection
160
350
mA
Thermal Shutdown
Temperature
150
C
Enable Input
V
IL
V
IH
I
IL
I
IH
Power Good
V
PG
Enable Input Voltage Level
Logic Low (off) , V
IN
= 5.5V
Logic High (on), V
IN
= 5.5V
V
IL
≤
0.4V, V
IN
= 5.5V
V
IH
≥
2.0V, V
IN
= 5.5V
0.4
V
V
μA
μA
2
Enable Input Current
0.01
0.01
Low Threshold
High Threshold
PG Output Logic-Low
Voltage
Power Good Output On -
Resistance
Power Good Leakage
Current
Delay Time to Power Good
% of V
OUT
(PG ON)
% of V
OUT
(PG OFF)
I
POWERGOOD
= 100μA, Fault
Condition
I
POWERGOOD
= 1mA, Fault Condition
89
%
97
10.0
V
OL
2.0
mV
R
DSON
20
I
PG
Power Good Off, V
PG
= 5.5V
0.01
μA
V
PG
Delay
See Timing Diagram
1
2.1
5
ms
Note 1:
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics.
Note 2:
Human body model, 1.5k
in series with 100pF.
Note 3:
The maximum power dissipation is a function of T
,
θ
, and T
. The maximum allowable power dissipation at any ambient temperature
is P
D
= (T
J(max)
–T
A
)/
θ
JA
. All numbers apply for packages soldered directly into a PC board.
Note 4:
Typical Values represent the most likely parametric norm.
Note 5:
All limits are guaranteed by testing or statistical analysis.
Note 6:
Regulation is measured at constant junction temperature using low duty cycle pulse testing.
L
www.national.com
4
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