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參數(shù)資料
| 型號： | LPC11E12FBD48/201, |
| 廠商： | NXP Semiconductors |
| 文件頁數(shù)： | 5/8頁 |
| 文件大小： | 0K |
| 描述： | IC MCU 32BIT 16K 48LQFP |
| 產品培訓模塊： | Code Density for LPC11xx |
| 標準包裝： | 250 |
| 系列： | LPC11Exx |
| 核心處理器： | ARM? Cortex?-M0 |
| 芯體尺寸： | 32-位 |
| 速度： | 50MHz |
| 連通性： | I²C，Microwire，SPI，SSI，SSP，UART/USART |
| 外圍設備： | 欠壓檢測/復位，POR，WDT |
| 輸入/輸出數(shù)： | 40 |
| 程序存儲器容量： | 16KB（16K x 8） |
| 程序存儲器類型： | 閃存 |
| EEPROM 大?。?/td> | 1K x 8 |
| RAM 容量： | 6K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 1.8 V ~ 3.6 V |
| 數(shù)據(jù)轉換器： | A/D 8x10b |
| 振蕩器型： | 內部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 48-LQFP |
| 包裝： | 托盤 |
| 其它名稱： | 568-8570 |
ES_LPC11E1X
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2013. All rights reserved.
Errata sheet
Rev. 2 — 1 February 2013
5 of 8
NXP Semiconductors
ES_LPC11E1x
Errata sheet LPC11E1x
3.2 I2C.1: In the slave-transmitter mode, the device set in the monitor
mode must write a dummy value of 0xFF into the DAT register
Introduction:
The I2C monitor allows the device to monitor the I2C traffic on the I2C bus in a
non-intrusive way.
Problem:
In the slave-transmitter mode, the device set in the monitor mode must write a dummy
value of 0xFF into the DAT register. If this is not done, the received data from the slave
device will be corrupted. To allow the monitor mode to have sufficient time to process the
data on the I2C bus, the device may need to have the ability to stretch the I2C clock.
Under this condition, the I2C monitor mode is not 100% non-intrusive.
Work-around:
When setting the device in monitor mode, enable the ENA_SCL bit in the MMCTRL
register to allow clock stretching.
Software code example to enable the ENA_SCL bit:
LPC_I2C_MMCTRL |= (1<<1); //Enable ENA_SCL bit
In the I2C ISR routine, for the status code related to the slave-transmitter mode, write the
value of 0xFF into the DAT register to prevent data corruption. In order to avoid stretching
the SCL clock, the data byte can be saved in a buffer and processed in the Main loop.
This ensures the SI flag is cleared as fast as possible.
Software code example for the slave-transmitter mode:
case 0xA8:
// Own SLA + R has been received, ACK returned
case 0xB0:
case 0xB8:
// data byte in DAT transmitted, ACK received
case 0xC0:
// (last) data byte transmitted, NACK received
case 0xC8:
// last data byte in DAT transmitted, ACK received
DataByte = LPC_I2C->DATA_BUFFER; //Save data. Data can be process in Main loop
LPC_I2C->DAT = 0xFF;
// Pretend to shift out 0xFF
LPC_I2C->CONCLR = 0x08;
// clear flag SI
break;
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