參數(shù)資料
型號: LPC2104BBD48
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: Single-chip 32-bit microcontrollers; 128 kB ISP/IAP Flash with 64 kB/32 kB/16 kB RAM
中文描述: 32-BIT, FLASH, 60 MHz, RISC MICROCONTROLLER, PQFP48
封裝: 7 X 7 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT313-2, LQFP-48
文件頁數(shù): 3/32頁
文件大?。?/td> 155K
代理商: LPC2104BBD48
Philips Semiconductors
LPC2104/2105/2106
Single-chip 32-bit microcontrollers
Product data
Rev. 04 — 05 February 2004
3 of 32
9397 750 12792
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
4.
Block diagram
(1) When test/debug interface is used, GPIO/other function sharing these pins are not available.
(2) APB with Ready signal.
Fig 1.
Block diagram.
INTERNAL
FLASH
CONTROLLER
002aaa412
AHB BRIDGE
E
M
TEST/DEBUG
INTERFACE
AHB
DECODER
AHB TO VPB
BRIDGE
VPB
DIVIDER
VECTORED INTERRUPT
CONTROLLER
SYSTEM
FUNCTIONS
PLL
system
clock
SCL*
SDA*
GPIO (32 PINS)
PWM1..6*
T
T
T
T
T
R
X
X
R
V
V
SCK*
MOSI*
MISO*
SSEL*
EINT0*
EINT1*
EINT2*
CAP0..2*
MAT0..2*
CAP0..3*
MAT0..3*
TxD*
RxD*
TxD*
RxD*
MODEM CONTROL
(6 PINS)*
SPI SERIAL
INTERFACE
I2C SERIAL
INTERFACE
UART0
UART1
WATCHDOG
TIMER
SYSTEM
CONTROL
EXTERNAL
INTERRUPTS
GENERAL
PURPOSE I/O
REAL TIME
CLOCK
CAPTURE/
COMPARE
TIMER 0
CAPTURE/
COMPARE
TIMER 1
PWM0
AMBA AHB
(Advanced High-performance Bus)
128 kB
FLASH
ARM7TDMI-S
INTERNAL SRAM
CONTROLLER
16/32/64 kB
SRAM
ARM7 LOCAL BUS
APB(2)
*Shared with GPIO
相關(guān)PDF資料
PDF描述
LPC2105BBD48 Single-chip 32-bit microcontrollers; 128 kB ISP/IAP Flash with 64 kB/32 kB/16 kB RAM
LPC2106BBD48 Single-chip 32-bit microcontrollers; 128 kB ISP/IAP Flash with 64 kB/32 kB/16 kB RAM
LPC2104 Single-chip 32-bit microcontrollers; 128 kB ISP/IAP Flash with 64 kB/32 kB/16 kB RAM
LPC2105 Single-chip 32-bit microcontrollers; 128 kB ISP/IAP Flash with 64 kB/32 kB/16 kB RAM
LPC2106 Single-chip 32-bit microcontrollers; 128 kB ISP/IAP Flash with 64 kB/32 kB/16 kB RAM
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