參數(shù)資料
型號(hào)： LPC2105
廠商： NXP Semiconductors N.V.
英文描述： Single-chip 32-bit microcontrollers; 128 kB ISP/IAP Flash with 64 kB/32 kB/16 kB RAM
中文描述： 單片32位微控制器，128 kB的供應(yīng)商/聯(lián)合會(huì)64 kB/32 kB/16 KB RAM內(nèi)存閃存
文件頁數(shù)： 17/32頁
文件大?。?/td> 155K
代理商： LPC2105
Philips Semiconductors
LPC2104/2105/2106
Single-chip 32-bit microcontrollers
Product data
Rev. 04 — 05 February 2004
17 of 32
9397 750 12792
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
6.12 SPI serial I/O controller
The SPI is a full duplex serial interface, designed to be able to handle multiple
masters and slaves connected to a given bus. Only a single master and a single slave
can communicate on the interface during a given data transfer. During a data transfer
the master always sends a byte of data to the slave, and the slave always sends a
byte of data to the master.
6.12.1
Features
Compliant with Serial Peripheral Interface (SPI) specification.
Synchronous, Serial, Full Duplex, Communication.
Combined SPI master and slave.
Maximum data bit rate of one eighth of the input clock rate.
6.13 General purpose timers
The Timer is designed to count cycles of the peripheral clock (PCLK) and optionally
generate interrupts or perform other actions at specified timer values, based on four
match registers. It also includes four capture inputs to trap the timer value when an
input signal transitions, optionally generating an interrupt.
6.13.1
Features
A 32-bit Timer/Counter with a programmable 32-bit Prescaler.
Up to four (TImer 1) and three (Timer 0) 32-bit capture channels, that can take a
snapshot of the timer value when an input signal transitions. A capture event may
also optionally generate an interrupt.
Four 32-bit match registers that allow:
–
Continuous operation with optional interrupt generation on match.
–
Stop timer on match with optional interrupt generation.
–
Reset timer on match with optional interrupt generation.
Up to four (Timer 1) and three (Timer 0) external outputs corresponding to match
registers, with the following capabilities:
–
Set LOW on match.
–
Set HIGH on match.
–
Toggle on match.
–
Do nothing on match.
6.14 Watchdog timer
The purpose of the Watchdog is to reset the microcontroller within a reasonable
amount of time if it enters an erroneous state. When enabled, the Watchdog will
generate a system reset if the user program fails to ‘feed’ (or reload) the Watchdog
within a predetermined amount of time.
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PDF描述
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
LPC2105BBD48 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Single-chip 32-bit microcontrollers; 128 kB ISP/IAP flash with 16/32/64 kB RAM
LPC2105BBD48,151 功能描述:ARM微控制器 - MCU ARM7 128KF/32KR/I2C RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:72 MHz 程序存儲(chǔ)器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風(fēng)格:SMD/SMT
LPC2105BBD48.151 制造商:NXP Semiconductors 功能描述:IC SM 32 BIT MCU WAFFLE125 制造商:NXP Semiconductors 功能描述:32BIT MCU 128K FLASH SMD LPC2105
LPC2105BBD48.151 制造商:NXP Semiconductors 功能描述:IC 32BIT MCU 128K FLASH SMD 2105
LPC2105FBD48 制造商:NXP Semiconductors 功能描述:32BIT MCU ARM7 128K FLASH 48LQFP 制造商:NXP Semiconductors 功能描述:32BIT MCU, ARM7, 128K FLASH, 48LQFP
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