參數(shù)資料
型號: LPC2129
廠商: NXP Semiconductors N.V.
英文描述: SPACER
中文描述: 單片16/32位微控制器,128/256 kB ISP / IAP閃存的10位ADC和CAN
文件頁數(shù): 18/34頁
文件大小: 163K
代理商: LPC2129
Philips Semiconductors
LPC2119/LPC2129
Single-chip 16/32-bit microcontrollers
Product data
Rev. 03 — 22 December 2004
18 of 34
9397 750 13146
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
6.12 CAN controllers and acceptance filter
The
LPC2119/LPC2129
each contain two CAN controllers. The Controller Area network
(CAN) is a serial communications protocol which efficiently supports distributed real-time
control with a very high level of security. Its domain of application ranges from high speed
networks to low cost multiplex wiring.
6.12.1
Features
Data rates up to 1 Mbit/s on each bus.
32-bit register and RAM access.
Compatible with CAN specification 2.0B, ISO 11898-1.
Global Acceptance Filter recognizes 11 and 29-bit Rx identifiers for all CAN buses.
Acceptance Filter can provide FullCAN-style automatic reception for selected
Standard identifiers.
6.13 UARTs
The LPC2119/LPC2129 each contain two UARTs. One UART provides a full modem
control handshake interface, the other provides only transmit and receive data lines.
6.13.1
Features
16 byte Receive and Transmit FIFOs.
Register locations conform to ‘550 industry standard.
Receiver FIFO trigger points at 1, 4, 8, and 14 bytes
Built-in baud rate generator.
Standard modem interface signals included on UART1.
6.14 I
2
C serial I/O controller
I
2
C is a bi-directional bus for inter-IC control using only two wires: a serial clock line
(SCL), and a serial data line (SDA). Each device is recognized by a unique address
and can operate as either a receiver-only device (e.g. an LCD driver or a transmitter
with the capability to both receive and send information (such as memory).
Transmitters and/or receivers can operate in either master or slave mode, depending
on whether the chip has to initiate a data transfer or is only addressed. I
2
C is a
multi-master bus, it can be controlled by more than one bus master connected to it.
I
2
C implemented in LPC2119/LPC2129 supports bit rate up to 400 kbit/s (Fast I
2
C).
6.14.1
Features
Standard I
2
C compliant bus interface.
Easy to configure as Master, Slave, or Master/Slave.
Programmable clocks allow versatile rate control.
Bidirectional data transfer between masters and slaves.
Multi-master bus (no central master).
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