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參數(shù)資料
| 型號： | LPC2157FBD100 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | Single-chip 16-bit-32-bit microcontrollers; 512 kB flash, with 32 segment x 4 LCD driver |
| 中文描述： | 32-BIT, FLASH, 60 MHz, RISC MICROCONTROLLER, PQFP100 |
| 封裝： | 14 X 14 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT407-1, LQFP-100 |
| 文件頁數(shù)： | 26/45頁 |
| 文件大?。?/td> | 220K |
| 代理商： | LPC2157FBD100 |
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LPC2157_2158_2
NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 9 February 2009
26 of 45
NXP Semiconductors
LPC2157/2158
Single-chip 16-bit/32-bit microcontrollers
In Power-down mode, the oscillator is shut down and the chip receives no internal clocks.
The processor state and registers, peripheral registers, and internal SRAM values are
preserved throughout Power-down mode and the logic levels of chip output pins remain
static. The Power-down mode can be terminated and normal operation resumed by either
a reset or certain specific interrupts that are able to function without clocks. Since all
dynamic operation of the chip is suspended, Power-down mode reduces chip power
consumption to nearly zero.
Selecting an external 32 kHz clock instead of the PCLK as a clock-source for the on-chip
RTC will enable the microcontroller to have the RTC active during Power-down mode.
Power-down current is increased with RTC active. However, it is significantly lower than in
Idle mode.
A Power Control for Peripherals feature allows individual peripherals to be turned off if
they are not needed in the application, resulting in additional power savings during active
and Idle mode.
6.19.9
APB bus
The APB divider determines the relationship between the processor clock (CCLK) and the
clock used by peripheral devices (PCLK). The APB divider serves two purposes. The first
is to provide peripherals with the desired PCLK via APB bus so that they can operate at
the speed chosen for the ARM processor. In order to achieve this, the APB bus may be
slowed down to
1
2
to
1
4
of the processor clock rate. Because the APB bus must work
properly at power-up (and its timing cannot be altered if it does not work since the APB
divider control registers reside on the APB bus), the default condition at reset is for the
APB bus to run at
1
4
of the processor clock rate. The second purpose of the APB divider
is to allow power savings when an application does not require any peripherals to run at
the full processor rate. Because the APB divider is connected to the PLL output, the PLL
remains active (if it was running) during Idle mode.
6.20 Emulation and debugging
The LPC2157/2158 supports emulation and debugging via a JTAG serial port. Debugging
functions are multiplexed with GPIOs on Port 1. This means that all communication, timer
and interface peripherals residing on Port 0 are available during the development and
debugging phase as they are when the application is run in the embedded system itself.
6.20.1
EmbeddedICE
Standard ARM EmbeddedICE logic provides on-chip debug support. The debugging of
the target system requires a host computer running the debugger software and an
EmbeddedICE protocol convertor. EmbeddedICE protocol convertor converts the remote
debug protocol commands to the JTAG data needed to access the ARM core.
The ARM core has a Debug Communications Channel (DCC) function built-in. The DCC
allows a program running on the target to communicate with the host debugger or another
separate host without stopping the program flow or even entering the debug state. The
DCC is accessed as a co-processor 14 by the program running on the ARM7TDMI-S
core. The DCC allows the JTAG port to be used for sending and receiving data without
affecting the normal program flow. The DCC data and control registers are mapped in to
addresses in the EmbeddedICE logic.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LPC2157FBD100,551 | 功能描述:ARM微控制器 - MCU 512K FL/32K RAM ADC/DAC LCD RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:72 MHz 程序存儲器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風(fēng)格:SMD/SMT |
| LPC2158 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Single-chip 16-bit/32-bit microcontrollers; 512 kB flash, with 32 segment x 4 LCD driver |
| LPC2158FBD100 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Single-chip 16-bit/32-bit microcontrollers; 512 kB flash, with 32 segment x 4 LCD driver |
| LPC2158FBD100,551 | 功能描述:ARM微控制器 - MCU 512K FL/40K RAM RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:72 MHz 程序存儲器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風(fēng)格:SMD/SMT |
| LPC2158FBD100-S | 功能描述:ARM微控制器 - MCU 512K FL/40K RAM USB LCD RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:72 MHz 程序存儲器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風(fēng)格:SMD/SMT |
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