參數(shù)資料
型號: LPC2194
廠商: NXP Semiconductors N.V.
英文描述: Single-chip 16/32-bit microcontrollers 256 kB ISP/IAP Flash with 10-bit ADC and CAN
中文描述: 單片16/32位微控制器,256 KB的ISP / IAP閃存的10位ADC和CAN
文件頁數(shù): 18/33頁
文件大?。?/td> 158K
代理商: LPC2194
Philips Semiconductors
LPC2194
Single-chip 16/32-bit microcontrollers
Preliminary data
Rev. 01 — 06 February 2004
18 of 33
9397 750 12757
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
I
2
C implemented in LPC2194 supports bit rate up to 400 kbit/s (Fast I
2
C).
6.14.1
Features
Standard I
2
C compliant bus interface.
Easy to configure as Master, Slave, or Master/Slave.
Programmable clocks allow versatile rate control.
Bidirectional data transfer between masters and slaves.
Multi-master bus (no central master).
Arbitration between simultaneously transmitting masters without corruption of
serial data on the bus.
Serial clock synchronization allows devices with different bit rates to communicate
via one serial bus.
Serial clock synchronization can be used as a handshake mechanism to suspend
and resume serial transfer.
The I
2
C bus may be used for test and diagnostic purposes.
6.15 SPI serial I/O controller
The LPC2194 contains two SPIs. The SPI is a full duplex serial interface, designed to
be able to handle multiple masters and slaves connected to a given bus. Only a single
master and a single slave can communicate on the interface during a given data
transfer. During a data transfer the master always sends a byte of data to the slave,
and the slave always sends a byte of data to the master.
6.15.1
Features
Compliant with Serial Peripheral Interface (SPI) specification.
Synchronous, Serial, Full Duplex, Communication.
Combined SPI master and slave.
Maximum data bit rate of one eighth of the input clock rate.
6.16 General purpose timers
The Timer is designed to count cycles of the peripheral clock (PCLK) and optionally
generate interrupts or perform other actions at specified timer values, based on four
match registers. It also includes four capture inputs to trap the timer value when an
input signal transitions, optionally generating an interrupt. Multiple pins can be
selected to perform a single capture or match function, providing an application with
‘or’ and ‘a(chǎn)nd’, as well as ‘broadcast’ functions among them.
6.16.1
Features
A 32-bit Timer/Counter with a programmable 32-bit Prescaler.
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