- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄12024 > LPC2294HBD144,551 (NXP Semiconductors)IC ARM7 MCU FLASH 256K 144-LQFP PDF資料下載
參數(shù)資料
| 型號(hào)： | LPC2294HBD144,551 |
| 廠商： | NXP Semiconductors |
| 文件頁(yè)數(shù)： | 7/54頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC ARM7 MCU FLASH 256K 144-LQFP |
| 標(biāo)準(zhǔn)包裝： | 60 |
| 系列： | LPC2200 |
| 核心處理器： | ARM7 |
| 芯體尺寸： | 16/32-位 |
| 速度： | 60MHz |
| 連通性： | CAN，EBI/EMI，I²C，Microwire，SPI，SSI，SSP，UART/USART |
| 外圍設(shè)備： | POR，PWM，WDT |
| 輸入/輸出數(shù)： | 112 |
| 程序存儲(chǔ)器容量： | 256KB（256K x 8） |
| 程序存儲(chǔ)器類型： | 閃存 |
| RAM 容量： | 16K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 1.65 V ~ 3.6 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 8x10b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 125°C |
| 封裝/外殼： | 144-LQFP |
| 包裝： | 托盤 |
| 配用： | OM10091-ND - KIT DEV PHYCORE-ARM7/LPC2220 568-1757-ND - BOARD EVAL FOR LPC220X ARM MCU |
| 其它名稱： | 568-2383 935278705551 LPC2294HBD144-S |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)當(dāng)前第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)
LPC2292_2294
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 8 — 8 June 2011
15 of 54
NXP Semiconductors
LPC2292/2294
16/32-bit ARM microcontrollers with external memory interface
6.
Functional description
6.1 Architectural overview
The ARM7TDMI-S is a general purpose 32-bit microprocessor, which offers high
performance and very low power consumption. The ARM architecture is based on RISC
principles, and the instruction set and related decode mechanism are much simpler than
those of microprogrammed CISC. This simplicity results in a high instruction throughput
and impressive real-time interrupt response from a small and cost-effective processor
core.
Pipeline techniques are employed so that all parts of the processing and memory systems
can operate continuously. Typically, while one instruction is being executed, its successor
is being decoded, and a third instruction is being fetched from memory.
The ARM7TDMI-S processor also employs a unique architectural strategy known as
Thumb, which makes it ideally suited to high-volume applications with memory
restrictions, or applications where code density is an issue.
The key idea behind Thumb is that of a super-reduced instruction set. Essentially, the
ARM7TDMI-S processor has two instruction sets:
The standard 32-bit ARM set
A 16-bit Thumb set
The Thumb set’s 16-bit instruction length allows it to approach twice the density of
standard ARM code while retaining most of the ARM’s performance advantage over a
traditional 16-bit processor using 16-bit registers. This is possible because Thumb code
operates on the same 32-bit register set as ARM code.
Thumb code is able to provide up to 65 % of the code size of ARM, and 160 % of the
performance of an equivalent ARM processor connected to a 16-bit memory system.
6.2 On-chip flash program memory
The LPC2292/2294 incorporate a 256 kB flash memory system respectively. This memory
may be used for both code and data storage. Programming of the flash memory may be
accomplished in several ways. It may be programmed In System via the serial port. The
application program may also erase and/or program the flash while the application is
running, allowing a great degree of flexibility for data storage field firmware upgrades, etc.
When the on-chip bootloader is used, 248 kB of flash memory is available for user code.
The LPC2292/2294 flash memory provides a minimum of 100000 erase/write cycles and
20 years of data retention.
On-chip bootloader (as of revision 1.64) provides Code Read Protection (CRP) for the
LPC2292/2294 on-chip flash memory. When the CRP is enabled, the JTAG debug port,
external memory boot and ISP commands accessing either the on-chip RAM or flash
memory are disabled. However, the ISP flash erase command can be executed at any
time (no matter whether the CRP is on or off). Removal of CRP is achieved by erasure of
full on-chip user flash. With the CRP off, full access to the chip via the JTAG and/or ISP is
restored.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AT89C51CC03CA-S3SUM | IC 8051 MCU FLASH 64K 52-PLCC |
| VI-JV0-IY-F4 | CONVERTER MOD DC/DC 5V 50W |
| AT89C51CC03CA-RDTUM | IC 8051 MCU 64K FLASH 64-VQFP |
| VI-JV0-IY-F3 | CONVERTER MOD DC/DC 5V 50W |
| VI-JV0-IY-F2 | CONVERTER MOD DC/DC 5V 50W |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LPC2294HBD144-S | 功能描述:ARM微控制器 - MCU ARM7 MCU FLASH 256K RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:72 MHz 程序存儲(chǔ)器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風(fēng)格:SMD/SMT |
| LPC2294JBD144 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:16/32-bit ARM microcontrollers 256 kB ISP/IAP Flash with CAN, 10-bit ADC and external memory interface |
| LPC2294JBD144,551 | 功能描述:ARM微控制器 - MCU 256K FL/16K RM/4 CAN/ADC/EXT B RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:72 MHz 程序存儲(chǔ)器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風(fēng)格:SMD/SMT |
| LPC2361 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Single-chip 16-bit/32-bit MCU; up to 128 kB flash with ISP/IAP, Ethernet, USB 2.0 device/host/OTG, CAN, and 10-bit ADC/DAC |
| LPC2361_10 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Single-chip 16-bit/32-bit MCU; up to 128 kB flash with ISP/IAP, Ethernet, USB 2.0 device/host/OTG, CAN, and 10-bit ADC/DAC |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。