- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄385497 > LPC2458FET180 (NXP Semiconductors N.V.) Single-chip 16-bit-32-bit micro; 512 kB flash, Ethernet, CAN, ISP-IAP, USB 2.0 device-host-OTG, external memory interface PDF資料下載
參數(shù)資料
| 型號： | LPC2458FET180 |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類： | 數(shù)學(xué)處理器 |
| 英文描述： | Single-chip 16-bit-32-bit micro; 512 kB flash, Ethernet, CAN, ISP-IAP, USB 2.0 device-host-OTG, external memory interface |
| 封裝： | LPC2458FET180<SOT570-3 (TFBGA180)|<<http://www.nxp.com/packages/SOT570-3.html<1<Always Pb-free,; |
| 文件頁數(shù)： | 19/80頁 |
| 文件大小： | 611K |
| 代理商： | LPC2458FET180 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁當(dāng)前第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁
LPC2458
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 4 — 1 September 2011
19 of 80
NXP Semiconductors
LPC2458
Single-chip 16-bit/32-bit micro
P4[31]/CS1
E7
[1]
I/O
O
O
P4[31] —
General purpose digital input/output pin.
CS1 —
LOW active Chip Select 1 signal.
ALARM —
RTC controlled output. This is a 1.8 V pin. It goes HIGH when a RTC
alarm is generated.
USB_D
2 —
USB port 2 bidirectional D
line.
DBGEN —
JTAG interface control signal. Also used for boundary scan.
TDO —
Test Data Out for JTAG interface.
TDI —
Test Data In for JTAG interface.
TMS —
Test Mode Select for JTAG interface.
TRST —
Test Reset for JTAG interface.
TCK —
Test Clock for JTAG interface. This clock must be slower than
1
6
of the
CPU clock (CCLK) for the JTAG interface to operate.
RTCK —
JTAG interface control signal.
Note:
LOW on this pin while RESET is LOW enables ETM pins (P2[9:0]) to
operate as Trace port after reset.
RSTOUT —
This is a 3.3 V pin. LOW on this pin indicates LPC2458 being in
Reset state.
external reset input:
A LOW on this pin resets the device, causing I/O ports and
peripherals to take on their default states, and processor execution to begin at
address 0. TTL with hysteresis, 5 V tolerant.
Input to the oscillator circuit and internal clock generator circuits.
Output from the oscillator amplifier.
Input to the RTC oscillator circuit.
Output from the RTC oscillator circuit.
ground:
0 V reference for the digital IO pins.
ALARM
H5
[7]
USB_D
2
DBGEN
TDO
TDI
TMS
TRST
TCK
N2
E5
[1][8]
B1
[1][9]
C3
[1][8]
C2
[1][8]
D4
[1][8]
D2
[1][9]
I/O
I
O
I
I
I
I
RTCK
C4
[1][8]
I/O
RSTOUT
H2
O
RESET
J1
[10]
I
XTAL1
XTAL2
RTCX1
RTCX2
V
SSIO
L2
[7][11]
K4
[7][11]
J2
[7][12]
J3
[7][12]
H4, P4,
L9, L13,
G13,
D13,
C11,
B4
[13]
H3, L8,
A10
[13]
F3
[14]
I
O
I
O
I
V
SSCORE
I
ground:
0 V reference for the core.
V
SSA
I
analog ground:
0 V reference. This should nominally be the same voltage as
V
SSIO
/V
SSCORE
, but should be isolated to minimize noise and error.
3.3 V supply voltage:
This is the power supply voltage for the I/O ports.
V
DD(3V3)
E2, L4,
K8, L11,
J14, E12,
E10,
C5
[15]
H1, L12,
G10
[16]
G1, N9,
E9
[17]
I
n.c.
I
not connected pins:
These pins must be left unconnected (floating).
V
DD(DCDC)(3V3)
I
3.3 V DC-to-DC converter supply voltage:
This is the power supply for the
on-chip DC-to-DC converter.
Table 4.
Symbol
Pin description
…continued
Ball
Type
Description
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LPC2468FBD208 | Single-chip 16-bit-32-bit micro; 512 kB flash, Ethernet, CAN, ISP-IAP, USB 2.0 device-host-OTG, external memory interface |
| LPC2468FET208 | Single-chip 16-bit-32-bit micro; 512 kB flash, Ethernet, CAN, ISP-IAP, USB 2.0 device-host-OTG, external memory interface |
| LPC2470FBD208 | Flashless 16-bit-32-bit microcontroller; Ethernet, CAN, LCD, USB 2.0 device-host-OTG, external memory interface |
| LPC2470FET208 | Flashless 16-bit-32-bit microcontroller; Ethernet, CAN, LCD, USB 2.0 device-host-OTG, external memory interface |
| LPC2478FBD208 | Single-chip 16-bit-32-bit micro; 512 kB flash, Ethernet, CAN, LCD, USB 2.0 device-host-OTG, external memory interface |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LPC2458FET180,551 | 功能描述:ARM微控制器 - MCU ARM7 512KF/USBH/ENET RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:72 MHz 程序存儲器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風(fēng)格:SMD/SMT |
| LPC2458FET180/CP32 | 功能描述:ARM微控制器 - MCU LPC2458FET180/TFBGA180/TRAYBDP RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:72 MHz 程序存儲器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風(fēng)格:SMD/SMT |
| LPC2458FET180551 | 制造商:NXP Semiconductors 功能描述:MCU ARM7 180TFBGA |
| LPC2460 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Flashless 16-bit/32-bit micro; Ethernet, CAN, ISP/IAP, USB 2.0 device/host/OTG, external memory interface |
| LPC2460_08 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Flashless 16-bit/32-bit micro; Ethernet, CAN, ISP/IAP, USB 2.0 device/host/OTG, external memory interface |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。