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參數(shù)資料
| 型號： | LPC2468FBD208 |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類： | 數(shù)學處理器 |
| 英文描述： | Single-chip 16-bit-32-bit micro; 512 kB flash, Ethernet, CAN, ISP-IAP, USB 2.0 device-host-OTG, external memory interface |
| 封裝： | LPC2468FBD208<SOT459-1 (LQFP208)|<<http://www.nxp.com/packages/SOT459-1.html<1<Always Pb-free,;LPC2468FET208<SOT950-1 (TFBGA208)|<<http://www.nxp.com/packages/SOT950-1.ht |
| 文件頁數(shù)： | 39/85頁 |
| 文件大小： | 682K |
| 代理商： | LPC2468FBD208 |
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LPC2468
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 6.1 — 6 September 2011
39 of 85
NXP Semiconductors
LPC2468
Single-chip 16-bit/32-bit micro
Pulse period and width can be any number of timer counts. This allows complete
flexibility in the trade-off between resolution and repetition rate. All PWM outputs will
occur at the same repetition rate.
Double edge controlled PWM outputs can be programmed to be either positive going
or negative going pulses.
Match register updates are synchronized with pulse outputs to prevent generation of
erroneous pulses. Software must ‘release’ new match values before they can become
effective.
May be used as a standard timer if the PWM mode is not enabled.
A 32-bit Timer/Counter with a programmable 32-bit Prescaler.
7.23 Watchdog timer
The purpose of the watchdog is to reset the microcontroller within a reasonable amount of
time if it enters an erroneous state. When enabled, the watchdog will generate a system
reset if the user program fails to ‘feed’ (or reload) the watchdog within a predetermined
amount of time.
7.23.1
Features
Internally resets chip if not periodically reloaded.
Debug mode.
Enabled by software but requires a hardware reset or a watchdog reset/interrupt to be
disabled.
Incorrect/Incomplete feed sequence causes reset/interrupt if enabled.
Flag to indicate watchdog reset.
Programmable 32-bit timer with internal prescaler.
Selectable time period from (T
cy(WDCLK)
256
4) to (T
cy(WDCLK)
2
32
4) in
multiples of T
cy(WDCLK)
4.
The Watchdog Clock (WDCLK) source can be selected from the RTC clock, the
Internal RC oscillator (IRC), or the APB peripheral clock. This gives a wide range of
potential timing choices of Watchdog operation under different power reduction
conditions. It also provides the ability to run the WDT from an entirely internal source
that is not dependent on an external crystal and its associated components and
wiring, for increased reliability.
7.24 RTC and battery RAM
The RTC is a set of counters for measuring time when system power is on, and optionally
when power is off. It uses little power in Power-down and Deep power-down modes. On
the LPC2468, the RTC can be clocked by a separate 32.768 kHz oscillator or by a
programmable prescale divider based on the APB clock. The RTC is powered by its own
power supply pin, VBAT, which can be connected to a battery or to the same 3.3 V supply
used by the rest of the device.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| LPC2468FBD208,551 | 功能描述:ARM微控制器 - MCU ARM7 512KF/USBH/ENET RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:72 MHz 程序存儲器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風格:SMD/SMT |
| LPC2468FBD208551 | 制造商:NXP Semiconductors 功能描述:IC 32BIT MCU 72MHZ LQFP-208 |
| LPC2468FET208 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Single-chip 16-bit/32-bit micro; 512 kB flash, Ethernet, CAN, ISP/IAP, USB 2.0 device/host/OTG, external memory interface |
| LPC2468FET208,551 | 功能描述:ARM微控制器 - MCU ARM7 512KF/USBH/ENET RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:72 MHz 程序存儲器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風格:SMD/SMT |
| LPC2468FET208/CP3E | 制造商:NXP Semiconductors 功能描述:- Trays |
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