SMSC DS – LPC47M14X
Page 4
Rev. 03/19/2001
TABLE OF CONTENTS
1
2
3
PIN LAYOUT..........................................................................................................................................................8
PIN CONFIGURATION...........................................................................................................................................9
DESCRIPTION OF PIN FUNCTIONS...................................................................................................................10
3.1
B
UFFER
T
YPE
D
ESCRIPTIONS
...........................................................................................................................14
3.2
P
INS
T
HAT
R
EQUIRE
E
XTERNAL
P
ULLUP
R
ESISTORS
..........................................................................................15
BLOCK DIAGRAM...............................................................................................................................................16
POWER FUNCTIONALITY...................................................................................................................................17
5.1
VCC P
OWER
..................................................................................................................................................17
5.1.1
3 Volt Operation / 5 Volt Tolerance.........................................................................................................17
5.2
USB P
OWER
..................................................................................................................................................17
5.3
VTR S
UPPORT
...............................................................................................................................................17
5.4
VREF P
IN
.....................................................................................................................................................17
5.5
I
NTERNAL
PWRGOOD...................................................................................................................................18
5.6
32.768
K
H
Z
T
RICKLE
C
LOCK
I
NPUT
..................................................................................................................18
5.7
T
RICKLE
P
OWER
F
UNCTIONALITY
......................................................................................................................18
5.8
M
AXIMUM
C
URRENT
V
ALUES
............................................................................................................................19
5.9
P
OWER
M
ANAGEMENT
E
VENTS
(PME/SCI) ......................................................................................................19
FUNCTIONAL DESCRIPTION.............................................................................................................................20
6.1
S
UPER
I/O R
EGISTERS
....................................................................................................................................20
6.2
H
OST
P
ROCESSOR
I
NTERFACE
(LPC)...............................................................................................................20
6.3
LPC I
NTERFACE
.............................................................................................................................................21
6.3.1
LPC Interface Signal Definition...............................................................................................................21
6.3.2
LPC Cycles.............................................................................................................................................21
6.3.3
Field Definitions......................................................................................................................................21
6.3.4
LFRAME# Usage....................................................................................................................................21
6.3.5
I/O Read and Write Cycles .....................................................................................................................22
6.3.6
DMA Read and Write Cycles..................................................................................................................22
6.3.7
DMA Protocol .........................................................................................................................................22
6.3.8
Power Management................................................................................................................................22
6.3.9
SYNC Protocol .......................................................................................................................................22
6.3.10
LPC Transfer ..........................................................................................................................................23
6.4
USB H
UB
F
UNCTIONAL
D
ESCRIPTION
...............................................................................................................24
6.4.1
USB Downstream Port Selection............................................................................................................25
6.5
FLOPPY DISK CONTROLLER ....................................................................................................................26
6.5.1
FDC Internal Registers...........................................................................................................................27
6.5.2
STATUS REGISTER ENCODING..........................................................................................................37
6.5.3
Instruction Set.........................................................................................................................................43
6.5.4
DATA TRANSFER COMMANDS............................................................................................................50
6.6
SERIAL PORT (UART) ................................................................................................................................60
6.7
INFRARED INTERFACE..............................................................................................................................72
6.8
MPU-401 MIDI UART...................................................................................................................................73
6.8.1
Overview.................................................................................................................................................73
6.8.2
Host Interface .........................................................................................................................................73
6.8.3
MIDI Data Port........................................................................................................................................74
6.8.4
Status Port..............................................................................................................................................74
6.8.5
MPU-401 Command Controller ..............................................................................................................76
6.8.6
MIDI UART .............................................................................................................................................77
6.8.7
MPU-401 Configuration Registers..........................................................................................................77
6.9
PARALLEL PORT........................................................................................................................................78
6.9.1
IBM XT/AT Compatible, Bi-Directional and EPP Modes.........................................................................79
6.9.2
Extended Capabilities Parallel Port.........................................................................................................84
6.10
POWER MANAGEMENT.............................................................................................................................94
6.11
SERIAL IRQ.................................................................................................................................................98
6.12
I
NTERRUPT
G
ENERATING
R
EGISTERS
..............................................................................................................101
6.13
8042 KEYBOARD CONTROLLER DESCRIPTION ...................................................................................102
6.13.1
Keyboard Interface ...............................................................................................................................103
6.13.2
External Keyboard and Mouse Interface...............................................................................................104
6.13.3
Keyboard Power Management .............................................................................................................104
6.13.4
Interrupts ..............................................................................................................................................104
6.13.5
Memory Configurations.........................................................................................................................104
6.13.6
Register Definitions...............................................................................................................................105
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