參數(shù)資料
型號: LRI64-SBN18
廠商: 意法半導(dǎo)體
英文描述: Memory TAG IC, 64-bit Unique ID with WORM User Area 13.56MHz, ISO 15693 Standard Compliant
中文描述: 內(nèi)存標(biāo)簽IC,64位唯一ID與WORM的用戶區(qū)13.56,ISO 15693標(biāo)準(zhǔn)兼容
文件頁數(shù): 12/38頁
文件大?。?/td> 515K
代理商: LRI64-SBN18
LRI64
12/38
LRI64 TO VCD FRAMES
Response Frames are delimited by a Start of
Frame (SOF) and an End of Frame (EOF) and are
implemented using a code violation mechanism.
The LRI64 supports these in the one subcarrier
mode, at the fast data rate, only.
The VCD is ready to receive a response frame
from the LRI64 before 320.9μs (t
1
) after having
sent a command frame.
LRI64 SOF
SOF comprises three parts: (see
Figure 11.
)
an unmodulated period of 56.64μs,
24 pulses of 423.75kHz (
f
c
/32),
a logic 1 which starts with an unmodulated
period of 18.88μs followed by 8 pulses of
423.75kHz.
LRI64 EOF
EOF comprises three parts: (see
Figure 12.
)
a logic 0 which starts with 8 pulses of
423.75kHz followed by an unmodulated
period of 18.88μs.
24 pulses of 423.75kHz (
f
C
/32),
an unmodulated time of 56.64μs.
Figure 11. Response SOF, using High Data Rate and One Subcarrier
Figure 12. Response EOF, using High Data Rate and One Subcarrier
AI06671B
113.28 μs
37.76 μs
AI06675B
113.28 μs
37.76 μs
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