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參數(shù)資料
| 型號： | LRS1329A |
| 英文描述： | MIXED MEMORY|SRAM+EEPROM|HYBRID|BGA|72PIN|PLASTIC |
| 中文描述： | 混合存儲器|靜態(tài)存儲器EEPROM中|混合|的BGA | 72PIN |塑料 |
| 文件頁數(shù)： | 14/43頁 |
| 文件大?。?/td> | 1326K |
| 代理商： | LRS1329A |
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LRS1382
12
5.5 Block Locking State Transitions upon F-WP Transition
(4)
Notes:
1. “F-WP = 0
→
1” means that F-WP is driven to V
IH
and “F-WP = 1
→
0” means that F-WP is driven to V
IL
.
2. State transition from the current state [011] to the next state depends on the previous state.
3. When F-WP is driven to V
IL
in [110] state, the state changes to [011] and the blocks are automatically locked.
4. In this state transitions table, assumes that lock configuration commands are not written in previous, current and next state.
Previous State
Current State
Result after F-WP Transition (Next State)
State
F-WP
DQ
1
DQ
0
F-WP = 0
→
1
(1)
F-WP = 1
→
0
(1)
-
-
[000]
[001]
0
0
0
0
0
1
[100]
[101]
-
-
[110]
(2)
[011]
0
1
1
[110]
-
Other than [110]
(2)
-
-
[111]
-
[100]
[101]
1
1
0
0
0
1
-
-
[000]
[001]
-
[110]
1
1
0
-
[011]
(3)
[011]
-
[111]
1
1
1
-
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