參數(shù)資料
型號: LS832
廠商: Linear Integrated Systems
英文描述: ULTRA LOW LEAKAGE LOW DRIFT MONOLITHIC DUAL N-CHANNEL JFET
中文描述: 超低漏低漂移整體式雙N溝道結(jié)型場效應(yīng)管
文件頁數(shù): 2/2頁
文件大小: 30K
代理商: LS832
Linear Integrated Systems
4042 Clipper Court, Fremont, CA 94538 TEL: (510) 490-9160 FAX: (510) 353-0261
SYMBOL
CHARACTERISTICS MIN. TYP. MAX. UNITS CONDITIONS
OUTPUT CONDUCTANCE
Full Conduction
--
Operating
--
Differential
--
COMMON MODE REJECTION
-20 log |
V
GS1-2
/
V
DS
|
-20 log |
V
GS1-2
/
V
DS
|
NOISE
Figure
--
Y
OSS
Y
OS
|Y
OS1-2
|
--
--
--
5
0.5
0.1
μ
mho
μ
mho
μ
mho
V
DG
= 10V
V
DG
= 10V
V
GS
= 0
I
D
= 30
μ
A
CMR
CMR
--
--
90
90
--
--
dB
dB
V
DS
= 10 to 20V
V
DS
= 5 to 10V
I
D
= 30
μ
A
I
D
= 30
μ
A
NF
--
1
dB
V
DS
= 10V
f= 100Hz
V
DG
= 10V
NBW= 1Hz
V
GS
= 0
NBW= 6Hz
I
D
= 30
μ
A f= 10Hz
R
G
= 10M
e
n
Voltage
--
20
70
nV/
Hz
CAPACITANCE
Input
Reverse Transfer
Drain-to-Drain
C
ISS
C
RSS
C
DD
--
--
--
--
--
--
3
1.5
0.1
pF
pF
pF
V
DS
= 10V
V
DS
= 10V
V
DG
= 10V
V
GS
= 0
V
GS
= 0
I
D
= 30
μ
A
f= 1MHz
f= 1MHz
NOTES:
1. These ratings are limiting values above which the serviceability of any semiconductor may be impaired.
TO-71
Six Lead
0.230
0.209
DIA.
DIA.
0.195
0.175
0.030
MAX.
0.500 MIN.
0.150
0.115
0.019
0.016
DIA.
6 LEADS
3
2
1
8
4
5
6
0.046
0.036
45°
0.048
0.028
0.100
0.050
7
TO-78
0.335
0.370
0.305
0.335
0.016
DIM. A
0.165
0.185
0.040
0.016
0.021
DIM. B
MIN. 0.500
0.200
0.100
0.100
0.028
0.034
45°
1
2
34
5
6
7
8
0.029
0.045
SEATING
PLANE
S1 1
D1
SS
G1
2
3
4
5
6
7
8
S2
G2
SS
D2
P-DIP
S1 1
D1
SS
G1
2
3
4
5
6
7
8
S2
G2
SS
D2
0.150
0.158
(3.81)
(4.01)
0.188
0.197
0.228
0.244
(5.79)
(6.20)
SOIC
0.320
0.290
(8.13)
(7.37)
0.405
(10.29)
MAX.
(4.78)
(5.00)
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