參數(shù)資料
型號: LSP2200CALM
廠商: LITE-ON SEMICONDUCTOR CORP
元件分類: 電源管理
英文描述: 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO3
封裝: SOT-23, 3 PIN
文件頁數(shù): 3/5頁
文件大?。?/td> 111K
代理商: LSP2200CALM
Liteon Semiconductor Corporation
LSP2200
3 PIN Microprocessor Reset Monitors
3/5
Rev1.1
low)
Vcc>1.0V, ISINK=50A
0.1
Vcc>VTH max, ISOURCE=500A
LSP2200-2.32/2.63/2.93/3.08
0.9Vc
c
RESET
_____________
Output
Voltage High
(push-pull active
low)
VOH
Vcc>VTH max, ISOURCE=80A
LSP2200-4.00/4.38/4.63
Vcc-1
.5
V
Typical Values: TA=-+25°C Vcc=5V for LSP2200-4.00/4.38/4.63
Vcc=3.3V for LSP2200-3.08/2.93
Vcc=3V for LSP2200-2.63
Vcc=2.5V for LSP2200-2.32
DETAILED DESCRIPTION
A microprocessor's (MPU) reset input starts the MPU in a known state. The LSP2200 reset to prevent code execution
errors during power-up, power-down, or brownout conditions. They assert a reset signal whenever the Vcc supply
voltage declines below a preset threshold, keeping it asserted for at least 250ms after Vcc has risen above the reset
threshold. The LSP2200 push-pull output stage.
APPLICATION INFORMATION
Reset Timing Diagram:
Figure1
When operating properly with 5V in (for example), VOUT will also be about 5V. When VIN starts to fall, VOUT will
follow it down as shown. When VIN drops below VTH, VOUT drops to ground and stays there unless VIN also falls
below its minimum operating voltage, approx. 1V. At this point, the supervisor loses control, and its output may rise,
only to again follow VIN down to the ground.
When VIN begins to rise, VOUT follows it until 1.0V or so is reached, whereupon the device regains control, VOUT is
pulled to ground, etc. When VIN rises above VTH, VOUT comes out of RESET 140ms later.
If it is required that a lower value than GND + 1.0V is needed on RESET signal during VCC ≤ 1V, a 100K resistor may
be used on the device output to GND (Figure 3).
Negative-Going VCC Transients
In addition to issuing a reset to the MPU during power-up, power-down, and brownout conditions, the LSP2200 is
relatively immune to short-duration negative-going Vcc transients (glitches). Figure2 shows typical transient duration
vs. reset comparator overdrive, for which the LSP2200 do not generate a reset pulse. The graph was generated
using a negative going pulse applied to Vcc, starting 0.5V above the actual reset threshold and ending below it by the
magnitude in dicated (reset comparator overdrive). The graph indicates the maximum pulse width a negative-going
Vcc transient can have without causing a reset pulse. As the magnitude of the transient increases (goes farther
below the reset threshold), the maximum allowable pulse width decreases. Typically, for the LSP2200-4.63/4.38, a
Vcc transient that goes 100mV below the reset threshold and lasts 20s or less will not cause a reset pulse. A 0.1F
bypass capacitor mounted as close as possible to the VCC pin provides additional transient immunity.
相關(guān)PDF資料
PDF描述
LSP2200CAEJ 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO3
LSP3103C18D 0.8 A SWITCHING REGULATOR, 1800 kHz SWITCHING FREQ-MAX, PDSO5
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LSP3103C18AD 0.8 A SWITCHING REGULATOR, 1800 kHz SWITCHING FREQ-MAX, PDSO5
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