參數(shù)資料
型號(hào): LSP3103C12D
廠商: LITE-ON SEMICONDUCTOR CORP
元件分類: 穩(wěn)壓器
英文描述: 0.8 A SWITCHING REGULATOR, 1800 kHz SWITCHING FREQ-MAX, PDSO5
封裝: SOT-23, 5 PIN
文件頁(yè)數(shù): 6/6頁(yè)
文件大?。?/td> 334K
代理商: LSP3103C12D
Liteon Semiconductor Corporation
LSP3103
500mA Synchronous Step-Down Converter
Rev1.2
6/9
tep-Down DC-DC converter. It utilizes internal MOSFETs to achieve high
URRENT MODE PWM CONTROL
WM control provides stable switching and cycle-by-cycle current limit for
ROPOUT OPERATION
creases toward the value of the output voltage, the LSP3103 allows the main switch to
OPERATION
onolithic switching mode S
LSP3103 is a m
efficiency and can generate very low output voltage by using internal reference at 0.6V. It operates at a fixed
switching frequency, and uses the slope compensated current mode architecture. This Step-Down DC-DC
Converter suppliers 500mA output current at VIN=3V with input voltage range from 2.5V to 6.5V.
C
Slope compensated current mode P
excellent load and line responses and protection of the internal main switch (P-Ch MOSFET) and synchronous
rectifier (N-Ch MOSFET). During normal operation, the internal P-Ch MOSFET is turned on for a certain time to
ramp the inductor current at each rising edge of the internal oscillator, and switched off when the peak inductor
current is above the error voltage. The current comparator, ICOMP, limits the peak inductor current. When the main
switch is off, the synchronous rectifier will be turned on immediately and stay on until either the inductor current
starts to reverse, as indicated by the current reversal comparator, IZERO, or the beginning of the next clock cycle. The
OVDET comparator controls output transient overshoots by turning the main switch off and keeping it off until the
faults is no longer present.
D
When the input voltage de
remain on for more than one switching cycle and increases the duty cycle until it reaches 100%.
The duty cycle D of a step-down converter is defined as:
OUT
V
D=T
f
100%
××
×
ON
OSC
IN
V
Where TON is the main switch on time and fOSC is the oscillator frequency (1.5MHz).
he outp
voltage then is the input voltage minus the voltage drop across the main switch and the inductor. At low
AXIMUM LOAD CURRENT
input supply voltages as low as 2.5V, however, the maximum load current decreases
ut
T
input supply voltage, the RDS(ON) of the P-Channel MOSFET increase, and the efficiency of the converter decreases.
Caution must be exercised to ensure the heat dissipated not to exceed the maximum junction temperature of the IC.
M
The LSP3103 will operate with
at lower input due to large IR drop on the main switch and synchronous rectifier. The slope compensation signal
reduces the peak inductor current as a function of the duty cycle to prevent sub harmonic oscillations at duty cycles
greater than 50%. Conversely the current limit increases as the duty cycle decreases.
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