參數(shù)資料
型號(hào)： LT1002MJ
廠(chǎng)商： LINEAR TECHNOLOGY CORP
元件分類(lèi)： 運(yùn)動(dòng)控制電子
英文描述： Dual, Matched Precision Operational Amplifier
中文描述： DUAL OP-AMP, 230 uV OFFSET-MAX, 0.8 MHz BAND WIDTH, CDIP14
封裝： 0.300 INCH, HERMETIC SEALED, CERDIP-14
文件頁(yè)數(shù)： 2/16頁(yè)
文件大?。?/td> 344K
代理商： LT1002MJ
2
LT1002
LT1002AM/LT1002AC
MIN
LT1002M/LT1002C
MIN
TYP
25
SYMBOL
V
OS
V
OS
Time
I
OS
I
B
e
n
e
n
PARAMETER
Input Offset Voltage
Long Term Input Offset Voltage
Stability
Input Offset Current
Input Bias Current
Input Noise Voltage
Input Noise Voltage Density
CONDITIONS
Note 1
TYP
MAX
MAX
100
UNITS
20
60
μ
V
Notes 2 and 3
0.3
0.3
±
0.6
0.35
10.3
9.6
800
500
126
123
100
±
14
±
14
±
13.5
0.25
0.8
46
4
1.5
2.8
0.4
0.4
±
0.7
0.38
10.5
9.8
800
500
126
123
80
±
14
±
14
±
13.5
0.25
0.8
48
4
2.0
4.2
μ
V/month
nA
nA
±
3.0
0.7
20.0
11.5
±
4.5
0.75
20.0
12.0
0.1Hz to 10Hz (Note 2)
f
O
= 10Hz (Note 5)
f
O
= 1000Hz (Note 2)
R
L
≥
2k
, V
O
=
±
12V
R
L
≥
1k
, V
O
=
±
10V
V
CM
=
±
13V
V
S
=
±
3V to
±
18V
Note 4
μ
V
p-p
nV
√
Hz
A
VOL
Large Signal Voltage Gain
400
250
110
108
20
±
13
±
13
±
12
0.1
0.4
350
220
110
105
13
±
13
±
13
±
12
0.1
0.4
V/mV
CMRR
PSRR
R
in
Common Mode Rejection Ratio
Power Supply Rejection Ratio
Input Resistance Differential Mode
Input Voltage Range
Maximum Output Voltage Swing
dB
dB
M
V
V
V
OUT
R
L
≥
2k
R
L
≥
1k
R
L
≥
2k
(Note 4)
Note 4
No load
No load, V
S
=
±
3V
SR
GBW
P
d
Slew Rate
Gain Bandwidth Product
Power Dissipation
per amplifier
V/
μ
s
MHz
75
7
85
8
mW
ABSOLUTE
AXI
U
RATIU
W
Supply Voltage (Note 6).........................................
±
22V
Differential Input Voltage ......................................
±
30V
Input Voltage Equal to Supply Voltage
Output Short Circuit Duration ......................... Indefinite
Operating Temperature Range
LT1002AM/LT1002M ....................... –55
°
C to 125
°
C
LT1002AC/LT1002C ............................... 0
°
C to 70
°
C
Storage Temperature Range
All Grades......................................... –65
°
C to 150
°
C
Lead Temperature (Soldering, 10 sec.).................300
°
C
W
W
PACKAGE/ORDER I
FOR
ATIO
W
U
U
1
2
3
4
5
6
7
TOP VIEW
J P
14 PIN HERMETIC
N PACK
14 PIN PLASTIC
14
13
12
11
10
9
8
NULL (A)
NULL (A)
–IN (A)
+IN (A)
V– (B)
OUT (B)
V+ (B)
V+ (A)
OUT (A)
V– (A)
+IN (B)
–IN (B)
NULL (B)
NULL (B)
–
–
+
+
A
B
LT1002AMJ
LT1002MJ
LT1002ACJ
LT1002CJ
LT1002ACN
LT1002CN
OFFSET
VOLTAGE
MAX
at 25
°
C
ORDER
PART NO.
60
μ
V
100
μ
V
60
μ
V
100
μ
V
60
μ
V
100
μ
V
NOTE:
Device may be operated even if insertion
is reversed; this is due to inherent symmetry of
pin locations of amplifiers A and B. (Note 6)
ELECTRICAL CHARACTERISTICS, IU
W
V
S
=
±
15V, T
A
= 25
°
C, unless otherwise noted
相關(guān)PDF資料
PDF描述
LT1002 444322401
LT1002A Dual, Matched Precision Operational Amplifier
LT1002AC Dual, Matched Precision Operational Amplifier
LT1002ACJ Dual, Matched Precision Operational Amplifier
LT1002ACN Dual, Matched Precision Operational Amplifier
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