參數(shù)資料
型號: LT1008IN8#PBF
廠商: Linear Technology
文件頁數(shù): 15/16頁
文件大小: 0K
描述: IC PREC OP-AMP UNIVRSL SNGL 8DIP
標準包裝: 50
放大器類型: 通用
電路數(shù): 1
轉(zhuǎn)換速率: 0.2 V/µs
電流 - 輸入偏壓: 30pA
電壓 - 輸入偏移: 30µV
電流 - 電源: 380µA
電壓 - 電源,單路/雙路(±): ±2 V ~ 18 V
工作溫度: -40°C ~ 85°C
安裝類型: 通孔
封裝/外殼: 8-DIP(0.300",7.62mm)
供應商設備封裝: 8-PDIP
包裝: 管件
8
LT1008
1008fb
APPLICATIO S I FOR ATIO
WU
UU
Achieving Picoampere/Microvolt Performance
In order to realize the picoampere—microvolt level accu-
racy of the LT1008, proper care must be exercised. For
example, leakage currents in circuitry external to the op
amp can significantly degrade performance. High quality
insulation should be used (e.g., Teflon
TM, Kel-F); cleaning
of all insulating surfaces to remove fluxes and other
residues will probably be required. Surface coating may be
necessary to provide a moisture barrier in high humidity
environments.
Board leakage can be minimized by encircling the input
circuitry with a guard ring operated at a potential close to
that of the inputs: in inverting configurations the guard
ring should be tied to ground, in noninverting connections
to the inverting input at Pin 2. Guarding both sides of the
printed circuit board is required. Bulk leakage reduction
depends on the guard ring width. Nanoampere level leak-
age into the compensation terminals can affect offset
voltage and drift with temperature.
The LT1008 is specified over a wide range of power supply
voltages from
±2V to ±18V. Operation with lower supplies
is possible down to
±1.2V (two Ni-Cad batteries).
+
LT1008
6
VO
2
3
*RESISTORS MUST HAVE LOW
THERMOELECTRIC POTENTIAL
THIS CIRCUIT IS ALSO USED AS
THE BURN-IN CONFIGURATION
FOR THE LT1008 WITH SUPPLY
VOLTAGES INCREASED TO
±20V
VO = 1000VOS
100
Ω*
50k*
7
4
15V
–15V
1008 AI02
Test Circuit for Offset Voltage and Its Drift with Temperature
+
LT1008
6
*METAL FILM
1008 AI04
eno
2
10M*
10k
10M*
100
Ω
3
1008 AI01
GUARD
OUTPUT
INPUTS
V+
COMPENSATION
V
1
8
7
6
5
4
3
2
Microvolt level error voltages can also be generated in the
external circuitry. Thermocouple effects caused by tem-
perature gradients across dissimilar metals at the con-
tacts to the input terminals can exceed the inherent drift of
the amplifier. Air currents over device leads should be
minimized, package leads should be short, and the two
input leads should be as close together as possible and
maintained at the same temperature.
Noise Testing
The 0.1Hz to 10Hz peak-to-peak noise of the LT1008 is
measured in the test circuit shown. The frequency re-
sponse of this noise tester indicates that the 0.1Hz corner
is defined by only one zero. The test time to measure 0.1Hz
to 10Hz noise should not exceed 10 seconds, as this time
limit acts as an additional zero to eliminate noise contribu-
tions from the frequency band below 0.1Hz.
A noise voltage density test is recommended when mea-
suring noise on a large number of units. A 10Hz noise
voltage density measurement will correlate well with a
0.1Hz to 10Hz peak-to-peak noise reading since both
results are determined by the white noise and the location
of the 1/f corner frequency.
Current noise is measured in the circuit shown and calcu-
lated by the following formula where the noise of the
source resistors is subtracted.
i
enV
M
n
no
=
()
Ω×
2
12
820
40
100
/
REFERENCE ONLY—OBSOLETE PACKAGE
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