15
LT1011/LT1011A
PACKAGE DESCRIPTIO
N
U
Dimensions in inches (millimeters) unless otherwise noted.
N8 Package
8-Lead PDIP (Narrow 0.300)
(LTC DWG # 05-08-1510)
S8 Package
8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
J8 Package
8-Lead CERDIP (Narrow 0.300, Hermetic)
(LTC DWG # 05-08-1110)
J8 1197
0.014 – 0.026
(0.360 – 0.660)
0.200
(5.080)
MAX
0.015 – 0.060
(0.381 – 1.524)
0.125
3.175
MIN
0.100
±
0.010
(2.540
±
0.254)
0.300 BSC
(0.762 BSC)
0.008 – 0.018
(0.203 – 0.457)
0
°
– 15
°
0.045 – 0.068
(1.143 – 1.727)
0.045 – 0.068
(1.143 – 1.727)
FULL LEAD
OPTION
0.023 – 0.045
(0.584 – 1.143)
HALF LEAD
OPTION
CORNER LEADS OPTION
(4 PLCS)
0.005
(0.127)
MIN
0.405
(10.287)
MAX
0.220 – 0.310
(5.588 – 7.874)
1
2
3
4
8
7
6
5
0.025
(0.635)
RAD TYP
NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE
OR TIN PLATE LEADS
N8 1197
0.100
±
0.010
(2.540
±
0.254)
0.065
(1.651)
TYP
0.045 – 0.065
(1.143 – 1.651)
0.130
±
0.005
(3.302
±
0.127)
0.020
(0.508)
MIN
0.018
±
0.003
(0.457
±
0.076)
0.125
(3.175)
MIN
0.009 – 0.015
(0.229 – 0.381)
0.300 – 0.325
(7.620 – 8.255)
0.325–0.015
+0.889
–0.381
8.255
(
)
1
2
3
4
8
7
6
5
0.255
±
0.015*
(6.477
±
0.381)
0.400*
(10.160)
MAX
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)
1
2
3
4
0.150 – 0.157**
(3.810 – 3.988)
8
7
6
5
0.189 – 0.197*
(4.801 – 5.004)
0.228 – 0.244
(5.791 – 6.197)
0.016 – 0.050
0.406 – 1.270
0.010 – 0.020
(0.254 – 0.508)
×
45
°
0
°
– 8
°
TYP
0.008 – 0.010
(0.203 – 0.254)
SO8 0996
0.053 – 0.069
(1.346 – 1.752)
0.014 – 0.019
(0.355 – 0.483)
0.004 – 0.010
(0.101 – 0.254)
0.050
(1.270)
TYP
DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
*
**
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.