參數(shù)資料
型號(hào): LT1011ACH
廠商: LINEAR TECHNOLOGY CORP
元件分類: 運(yùn)動(dòng)控制電子
英文描述: Voltage Comparator
中文描述: COMPARATOR, 1000 uV OFFSET-MAX, 150 ns RESPONSE TIME, MBCY8
封裝: METAL CAN, TO-5, 8 PIN
文件頁數(shù): 7/16頁
文件大?。?/td> 205K
代理商: LT1011ACH
7
LT1011/LT1011A
of the comparator, but require a minimuminput signal
slew rate to be effective. DC hysteresis works for all
input slew rates, but creates a shift in offset voltage
dependent on the previous condition of the input sig-
nal. The circuit shown in Figure 1 is an excellent
compromise between AC and DC hysteresis.
APPLICATIO
S I
N
FOR
ATIO
U
W
U
+
+
3
7
1
5
6
8
LT1011
INPUTS
2
μ
F
TANT
4
2
–15V
C1
0.003
μ
F
0.1
μ
F
1011 F01
R2
15M
15V
R
L
OUTPUT
Figure 1. Comparator with Hysteresis
This circuit is especially useful for general purpose
comparator applications because it does not force any
signals directly back onto the input signal source.
Instead, it takes advantage of the unique properties of
the BALANCE pins to provide extremely fast, clean
output switching even with low frequency input sig-
nals in the millivolt range. The 0.003
μ
F capacitor from
Pin 6 to Pin 8 generates AC hysteresis because the
voltage on the BALANCE pins shifts slightly, depend-
ing on the state of the output. Both pins move about
4mV. If one pin (6) is bypassed, AC hysteresis is
created. It is only a few millivolts referred to the in-
puts, but is sufficient to switch the output at nearly the
maximum speed of which the comparator is capable.
To prevent problems from low values of input slew
rate, a slight amount of DC hysteresis is also used. The
sensitivity of the BALANCE pins to current is about
0.5mV input referred offset for each microampere of
BALANCE pin current. The 15M resistor tied from
OUTPUT to Pin 5 generates 0.5mV DC hysteresis. The
combination of AC and DC hysteresis creates clean
oscillation-free switching with very small input errors.
Figure 2 plots input referred error versus switching
frequency for the circuit as shown.
Note that at low frequencies, the error is simply the DC
hysteresis, while at high frequencies, an additional
TIME/FREQUENCY (
μ
s)
1
2
I
3
4
5
6
10
100
1000
1011 F02
1
0
–1
–2
7
8
C8 TO C6 = 0.003
μ
F
(50kHz)
(5kHz)
OUTPUT “HI” TO “LO”
OUTPUT “LO” TO “HI”
Figure 2. Input Offset Voltage vs Time to Last Transition
error is created by the AC hysteresis. The high
frequency error can be reduced by reducing C
H
, but
lower values may not provide clean switching with
very low slew rate input signals.
Input Protection
The inputs to the LT1011 are particularly suited to general
purpose comparator applications because large differen-
tial and/or common mode voltages can be tolerated with-
out damage to the comparator. Either or both inputs can
be raised 40V above the negative supply, independent of
the positive supply voltage Internal forward biased diodes
will conduct when the inputs are taken below the negative
supply. In this condition, input current must be limited to
1mA. If very large (fault) input voltages must be accom-
modated, series resistors and clamp diodes should be
used (see Figure 3).
+
LT1011
R4*
300
R3*
300
3
2
INPUTS
D1 TO D4: 1N4148
MAY BE ELIMINATED FOR I
FAULT
1mA
SELECT ACCORDING TO ALLOWABLE
FAULT CURRENT AND POWER DISSIPATION
*
**
R1**
V
+
V
R2**
8
D2
4
1011 F03
D4
D1
D3
Figure 3. Limiting Fault Input Currents
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