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參數(shù)資料
| 型號： | LT1112MJ8 |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | 運動控制電子 |
| 英文描述： | Dual/Quad Low Power Precision, Picoamp Input Op Amps |
| 中文描述： | DUAL OP-AMP, 150 uV OFFSET-MAX, 0.75 MHz BAND WIDTH, CDIP8 |
| 封裝： | 0.300 INCH, CERDIP-8 |
| 文件頁數(shù)： | 5/12頁 |
| 文件大?。?/td> | 369K |
| 代理商： | LT1112MJ8 |
5
LT1112/LT1114
SYMBOL PARAMETER
V
OS
Input Offset Voltage
CONDITIONS (Note 2)
LT1112N8
LT1112S8, LT1114N/S
V
S
=
±
1.2V
LT1112N8
LT1112S8, LT1114N/S
MIN
TYP
30
40
55
0.15
0.30
70
MAX
110
135
200
0.50
1.10
330
MIN
TYP
35
45
60
0.20
0.40
85
110
±
120
±
150
±
14.1
132
125
3300
900
MAX
135
160
240
0.75
1.30
400
600
±
550
±
800
UNITS
G
G
G
μ
V
μ
V
μ
V
V
OS
Temp
I
OS
Average Input Offset Voltage Drift
G
G
μ
V/
°
C
μ
V/
°
C
Input Offset Current
G
G
pA
pA
pA
pA
V
dB
dB
LT1114S
I
B
Input Bias Current
G
G
±
110
±
500
LT1114S
V
CM
CMRR
PSRR
A
VOL
Input Voltage Range
Common-Mode Rejection Ratio
Power Supply Rejection Ratio
Large-Signal Voltage Gain
G
±
13.5
117
113
700
400
±
13.0
±
13.85
0.13
±
14.1
132
125
3300
1100
±
13.5
112
111
600
300
±
13.0
±
13.85
0.13
V
CM
=
±
13.5V
V
S
=
±
1.2V to
±
20V
V
O
=
±
12V, R
L
= 10k
V
O
=
±
10V, R
L
= 2k
R
L
= 10k
G
G
G
G
V/mV
V/mV
V
OUT
SR
I
S
V
OS
Output Voltage Swing
Slew Rate
Supply Current per Amplifier
Offset Voltage Match
(Note 5)
Offset Voltage Match Drift
(Notes 5)
Noninverting Bias Current Match
(Notes 5, 6)
Common-Mode Rejection Ratio
Power Supply Rejection Ratio
G
V
G
0.24
370
50
60
0.2
0.4
140
0.24
370
60
70
0.3
0.5
155
190
133
127
V/
μ
s
μ
A
μ
V
μ
V
μ
V/
°
C
μ
V/
°
C
G
450
180
230
0.7
1.6
660
510
225
270
1.0
1.9
770
1300
LT1112N8
LT1112S8, LT1114N/S
LT1112N8
LT1112S8, LT1114N/S
G
G
G
G
I
B+
G
G
pA
pA
dB
dB
LT1114S
(Notes 5, 7)
(Notes 5, 7)
CMRR
PSRR
G
113
110
133
127
109
107
G
ELECTRICAL CHARACTERISTICS
V
S
=
±
15V, –40
°
C
≤
T
A
≤
85
°
C, (Note 10)
LT1112ACN8
LT1114ACN
LT1112N8/S8
LT1114CN/S
The
G
denotes specifications which apply over the operating temperature
range.
Note 1:
Differential input voltages greater than 1V will cause excessive
current to flow through the input protection diodes unless limiting
resistance is used.
Note 2:
Typical parameters are defined as the 60% yield of parameter
distributions of individual amplifiers; i.e., out of 100 LT1114s (or 100
LT1112s) typically 240 op amps (or 120) will be better than the indicated
specification.
Note 3:
This parameter is guaranteed by design and is not tested.
Note 4:
Offset voltage, supply current and power supply rejection ratio are
measured at the minimum supply voltage.
Note 5:
Matching parameters are the difference between amplifiers A and
D and between B and C on the LT1114; between the two amplifiers on the
LT1112.
Note 6:
This parameter is the difference between two noninverting
input bias currents.
Note 7:
CMRR and
PSRR are defined as follows: (1) CMRR and
PSRR are measured in
μ
V/V on the individual amplifiers. (2) The
difference is calculated between the matching sides in
μ
V/V. (3) The
result is converted to dB.
Note 8:
This parameter is not 100% tested.
Note 9:
These parameters are not tested. More than 99% of the op
amps tested during product characterization have passed the
maximum limits. 100% passed at 1kHz.
Note 10:
The LT1112/LT1114 are not tested and are not quality
assurance sampled at –40
°
C and at 85
°
C. These specifications are
guaranteed by design, correlation and/or inference from –55
°
C, 0
°
C,
25
°
C, 70
°
C and/or 125
°
C tests.
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| LT1112S8 | Dual 4-Input Positive-AND Gates 14-PDIP 0 to 70 |
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| LT1114C | Dual/Quad Low Power Precision, Picoamp Input Op Amps |
| LT1114CN | Dual/Quad Low Power Precision, Picoamp Input Op Amps |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LT1112MPS8 | 制造商:Linear Technology 功能描述:OP Amp Dual GP ±20V 8-Pin SOIC N |
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| LT1112MPS8#TR | 制造商:Linear Technology 功能描述:OP Amp Dual GP 制造商:Linear Technology 功能描述:OP Amp Dual GP ±20V 8-Pin SOIC N T/R |
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