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參數(shù)資料
| 型號： | LT1116CS8#TR |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 3/8頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC COMPARATOR 12NS SINGLE 8SOIC |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 系列： | UltraFast™ |
| 類型： | 帶鎖銷 |
| 元件數(shù)： | 1 |
| 輸出類型： | CMOS，補充型，TTL |
| 電壓 - 輸入偏移（最小值）： | 3mV @ 5V |
| 電流 - 輸入偏壓（最小值）： | 20µA @ 5V |
| 電流 - 輸出（標(biāo)準(zhǔn)）： | 20mA |
| 電流 - 靜態(tài)（最大值）： | 38mA |
| CMRR, PSRR（標(biāo)準(zhǔn)）： | 90dB CMRR，75dB PSRR |
| 傳輸延遲（最大）： | 16ns |
| 工作溫度： | 0°C ~ 70°C |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 安裝類型： | 表面貼裝 |
| 包裝： | 帶卷 (TR) |
LT1116
3
1116fb
SYMBOL
PARAMETERS
CONDITIONS
MIN
TYP
MAX
UNITS
VIH
+ Positive Latch Threshold
●
2.0
V
VIL
– Latch Threshold
●
0.8
V
IIL
Latch Input Current
VLATCH = 0V
●
–20
–500
A
tPD
Propagation Delay
VIN = 100mV, OD = 5mV (Note 4)
12
16
ns
●
18
ns
tPD
Propagation Delay
VIN = 100mV, OD = 20mV (Note 4)
10
14
ns
●
16
ns
tPD
Differential Propagation Delay
VIN = 100mV, OD = 5mV (Note 4)
3
ns
tSU
Latch Set-Up Time
(Note 5)
2
ns
tH
Latch Hold Time
(Note 5)
2
ns
ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over full operating temperature
range, otherwise specifications are at TA = 25°C. V+ = 5V, V+ = –5V, VOUT = (Q) = I .4V, LATCH = 0V, unless noted.
Note 4: tPD and tPD cannot be measured in automatic handling
equipment with low values of overdrive. The LT1116 is sample tested with
a 1V step and 500mV overdrive. Correlation tests have shown that tPD and
tPD can be guaranteed with this test if additional DC tests are performed
to verify internal bias conditions are correct. For low overdrive conditions
VOS is added to the measured overdrive.
Note 5: Input latch set-up time, tSU, is the interval in which the input signal
must be stable prior to asserting the latch signal. The hold time,
tH, is the interval after the latch is asserted in which the input signal must
be stable.
Gain CharacteristIcs
Propagation Delay
vs Load Capacitance
Propagation Delay vs Overdrive
DIFFERENTIAL INPUT VOLTAGE (mV)
– 2.5
2.5
OUTPUT
VOLTAGE
(V)
3.0
4.0
3.5
2.5
1.5
0.5
5.0
4.5
2.0
1.0
0
– 1.5
1.5
– 0.5
0.5
0
LT1116 TPC01
VS = ±5V
IOUT = 0
TJ = 125°C
TJ = –55°C
TJ = 25°C
OVERDRIVE VOLTAGE (mV)
0
DELAY
(ns)
15
20
25
40
10
5
0
10
20
30
50
LT1116 TPC02
TJ = 25°C
STEP SIZE = 100mV
tPDLH
tPDHL
OUTPUT LOAD CAPACITANCE (pF)
0
DELAY
(ns)
12
16
20
18
14
10
6
2
40
8
4
0
10
20
30
50
LT1116 TPC03
STEP = 100mV, OVERDRIVE = 5mV
tPDLH
tPDHL
TYPICAL PERFOR A CE CHARACTERISTICS
UW
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliabilty and lifetime.
Note 2: Input offset voltage is defined as the average of two offset
voltages measured by forcing first the Q output to 1.4V then forcing
the Q output to 1.4V.
Note 3: Input bias current is defined as the average of the two input
currents.
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| LT1117 | 制造商:LINER 制造商全稱:Linear Technology 功能描述:800mA Low Dropout Positive Regulators Adjustable and Fixed 2.85V, 3.3V, 5V |
| LT1117_02 | 制造商:LINER 制造商全稱:Linear Technology 功能描述:800mA Low Dropout Positive Regulators Adjustable and Fixed 2.85V, 3.3V, 5V |
| LT1117_1 | 制造商:LINER 制造商全稱:Linear Technology 功能描述:800mA Low Dropout Positive Regulators Adjustable and Fixed 2.85V, 3.3V, 5V |
| LT1117-2.85 | 制造商:LINER 制造商全稱:Linear Technology 功能描述:800mA Low Dropout Positive Regulators Adjustable and Fixed 2.85V, 3.3V, 5V |
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