參數(shù)資料
型號(hào)： LT1122AMJ8
廠商： LINEAR TECHNOLOGY CORP
元件分類： 運(yùn)動(dòng)控制電子
英文描述： Fast Settling, JFET Input Operational Amplifier
中文描述： OP-AMP, 2400 uV OFFSET-MAX, 14 MHz BAND WIDTH, CDIP8
封裝： HERMETIC SEALED, DIP-8
文件頁(yè)數(shù)： 2/8頁(yè)
文件大?。?/td> 249K
代理商： LT1122AMJ8
2
LT1122
Supply Voltage ....................................................
±
20V
Differential Input Voltage ......................................
±
40V
Input Voltage ........................................................
±
20V
Output Short Circuit Duration ..........................Indefinite
Lead Temperature (Soldering, 10 sec.).................300
°
C
Operating Temperature Range
LT1122AM/BM/CM/DM ....................– 55
°
C to 125
°
C
LT1122AC/BC/CC/DC/CS/DS ..............– 40
°
C to 85
°
C
Storage Temperature Range
All Devices....................................... – 65
°
C to 150
°
C
U
PACKAGE/ORDER U
LT1122AMJ8 LT1122CCJ8
LT1122BMJ8 LT1122DCJ8
LT1122CMJ8 LT1122ACN8
LT1122DMJ8 LT1122BCN8
LT1122ACJ8
LT1122BCJ8
LT1122CCN8
LT1122DCN8
ORDER PART
NUMBER
ORDER PART
NUMBER
LT1122CS8
LT1122DS8
PART MARKING
1122C
1122D
A
U
G
W
A
W
U
W
A
R
BSOLUTE
XI
TI
S
8
7
6
5
4
3
2
1
V
TRIM
–IN
+IN
V
V TRIM
OUT
+
V
SPEED BOOST/
OVERCOMP
TOP VIEW
N8 PACKAGE
8-LEAD PLASTIC DIP
–
OS
LT1122
J8 PACKAGE
8-LEAD HERMETIC DIP
T
JMAX
= 150
°
C,
θ
JA
= 130
°
C/W (N8)
T
JMAX
= 175
°
C,
θ
JA
= 100
°
C/W (J8)
8
7
6
5
4
3
2
1
–IN
V
TRIM
+IN
–
V TRIM
OUT
OS
V
SPEED BOOST/
OVERCOMP
+
TOP VIEW
S8 PACKAGE
8-LEAD PLASTIC SOIC
V
LT1122
T
JMAX
= 150
°
C,
θ
JA
= 190
°
C/W
Consult factory for Industrial grade parts.
ELECTRICAL C
HARA TERISTICS
V
S
=
±
15V, T
A
= 25
°
C, V
CM
= 0V unless otherwise noted. (Note 1)
LT1122CM/DM
LT1122CC/DC
LT1122CS/DS
MIN
TYP
130
5
12
LT1122AM/BM
LT1122AC/BC
MIN
TYP
120
4
10
SYMBOL
V
OS
I
OS
I
B
PARAMETER
Input Offset Voltage
Input Offset Current
Input Bias Current
Input Resistance
Differential
Common Mode
CONDITIONS
MAX
600
40
75
MAX
900
50
100
UNITS
μ
V
pA
pA
10
12
10
12
10
11
4
80
10
12
10
12
10
11
4
75
pF
V
CM
= – 10V to + 8V
V
CM
= + 8V to + 11V
Input Capacitance
Slew Rate
Settling Time (Note 2)
S
R
A
V
= – 1
+ 10V to 0V, – 10V to 0V
100% Tested: A and C Grades
60
50
V/
μ
s
to 1mV at Sum Node
340
350
450
14
1.2
500
250
99
540
350
360
470
13
1.1
450
220
98
590
ns
ns
ns
B and D Grades to 1mV at Sum Node
All Grades to 0.5mV at Sum Node
GBW
Gain Bandwidth Product
Power Bandwidth
Large Signal Voltage Gain
MHz
MHz
V/mV
V/mV
V
OUT
= 20Vp-p
V
OUT
=
±
10V, R
L
= 2k
V
OUT
=
±
10V, R
L
= 600
V
CM
=
±
10V
(Note 3)
V
S
=
±
10V to
±
18V
0.1Hz to 10Hz
f
O
= 100Hz
f
O
= 10kHz
f
O
= 100Hz, f
O
= 10kHz
A
VOL
180
130
83
150
110
80
CMRR
Common Mode Rejection Ratio
Input Voltage Range
Power Supply Rejection Ratio
Input Noise Voltage
Input Noise Voltage Density
dB
V
dB
±
10.5
86
±
11
103
3.0
25
14
2
±
10.5
82
±
11
101
3.3
27
15
2
PSRR
μ
V
P-P
nV/
√
Hz
nV/
√
Hz
fA/
√
Hz
Input Noise Current Density
相關(guān)PDF資料
PDF描述
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參數(shù)描述
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