RG 2 OUTPUT 6 REF 1168 F01 5 7 – + A1 – + A3 VB R1 24.7k R3 400 R4 " />
參數(shù)資料
型號(hào): LT1168IN8
廠(chǎng)商: Linear Technology
文件頁(yè)數(shù): 3/20頁(yè)
文件大小: 0K
描述: IC AMP INSTR PROG PREC LP 8DIP
標(biāo)準(zhǔn)包裝: 50
放大器類(lèi)型: 儀表
電路數(shù): 1
轉(zhuǎn)換速率: 0.5 V/µs
增益帶寬積: 400kHz
電流 - 輸入偏壓: 80pA
電壓 - 輸入偏移: 20µV
電流 - 電源: 350µA
電流 - 輸出 / 通道: 32mA
電壓 - 電源,單路/雙路(±): 4.6 V ~ 36 V,±2.3 V ~ 18 V
工作溫度: -40°C ~ 85°C
安裝類(lèi)型: 通孔
封裝/外殼: 8-DIP(0.300",7.62mm)
供應(yīng)商設(shè)備封裝: 8-PDIP
包裝: 管件
11
LT1168
1168fa
BLOCK DIAGRA
W
Q1
RG
2
OUTPUT
6
REF
1168 F01
5
7
+
A1
+
A3
VB
R1
24.7k
R3
400
R4
400
C1
1
RG 8
R7
30k
R8
30k
R5
30k
R6
30k
DIFFERENCE AMPLIFIER STAGE
PREAMP STAGE
+IN
–IN
3
+
A2
VB
R2
24.7k
C2
+VS
–VS
+VS
–VS
Q2
–VS
+VS
4 –VS
Figure 1. Block Diagram
The LT1168 is a modified version of the three op amp
instrumentation amplifier. Laser trimming and monolithic
construction allow tight matching and tracking of circuit
parameters over the specified temperature range. Refer to
the block diagram (Figure 1) to understand the following
circuit description. The collector currents in Q1 and Q2 are
trimmed to minimize offset voltage drift, thus assuring a
high level of performance. R1 and R2 are trimmed to an
absolute value of 24.7k to assure that the gain can be set
accurately (0.6% at G = 100) with only one external
resistor RG. The value of RG in parallel with R1 (R2)
determines the transconductance of the preamp stage. As
RG is reduced for larger programmed gains, the transcon-
ductance of the input preamp stage increases to that of the
input transistors Q1 and Q2. This increases the open-loop
gain when the programmed gain is increased, reducing
the input referred gain related errors and noise. The input
voltage noise at gains greater than 50 is determined only
by Q1 and Q2. At lower gains the noise of the difference
amplifier and preamp gain setting resistors increase the
noise. The gain bandwidth product is determined by C1,
C2 and the preamp transconductance which increases
with programmed gain. Therefore, the bandwidth does not
drop proportionally with gain.
The input transistors Q1 and Q2 offer excellent matching,
which is inherent in NPN bipolar transistors, as well as
picoampere input bias current due to superbeta process-
ing. The collector currents in Q1 and Q2 are held constant
due to the feedback through the Q1-A1-R1 loop and
Q2-A2-R2 loop which in turn impresses the differential
input voltage across the external gain set resistor RG.
Since the current that flows through RG also flows through
R1 and R2, the ratios provide a gained-up differential
THEORY OF OPERATIO
U
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