Input resistance = 1013 Input no" />
參數(shù)資料
型號: LT1169CS8#TR
廠商: Linear Technology
文件頁數(shù): 2/12頁
文件大?。?/td> 0K
描述: IC OPAMP JFET DUAL LONOISE 8SOIC
標準包裝: 2,500
放大器類型: J-FET
電路數(shù): 2
轉(zhuǎn)換速率: 4.2 V/µs
增益帶寬積: 5.3MHz
電流 - 輸入偏壓: 4pA
電壓 - 輸入偏移: 600µV
電流 - 電源: 5.3mA
電壓 - 電源,單路/雙路(±): ±4.5 V ~ 20 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應商設備封裝: 8-SO
包裝: 帶卷 (TR)
10
LT1169
U
S
A
O
PPLICATI
WU
U
I FOR ATIO
Input offset current = 3pA
Input resistance = 1013
Input noise = 3.4
VP-P
High Speed Operation
The low noise performance of the LT1169 was achieved by
enlarging the input JFET differential pair to maximize the
first stage gain. Enlarging the JFET geometry also increases
the parasitic gate capacitance, which if left unchecked, can
result in increased overshoot and ringing. When the feed-
back around the op amp is resistive (RF), a pole will be
created with RF, the source resistance and capacitance
(RS,CS), and the amplifier input capacitance (CIN = 1.5pF).
In closed-loop gain configurations with RS and RF in the
M
range(Figure6),thispolecancreateexcessphaseshift
and even oscillation. A small capacitor (CF) in parallel with
RF eliminates this problem. With RS(CS + CIN) = RFCF, the
effect of the feedback pole is completely removed.
Light Balance Detection Circuit
Unity-Gain Buffer with Extended Load Capacitance
Drive Capability
TYPICAL APPLICATIONS N
U
Assume CMRRA = 50V/V or 86dB,
and CMRRB = 39V/V or 88dB,
then
CMRR = 11V/V or 99dB;
if CMRRB = –39V/V which is still 88dB,
then
CMRR = 89V/V or 81dB
By specifying and guaranteeing all of these matching
parameters, the LT1169 can significantly improve the
performance of matching-dependent circuits.
Typical performance of the instrumentation amplifier:
Input offset voltage = 0.8mV
Input bias current = 4pA
Figure 5. Three Op Amp Instrumentation Amplifier
+
LT1169 F06
OUTPUT
RF
RS
CS
CIN
CF
Figure 6
4
2
3
OUTPUT
C1
30pF
R7
10k
R6
10k
LT1169 F05
GAIN =
BANDWIDTH =
INPUT REFERRED NOISE =
WIDEBAND NOISE DC TO 330kHz =
CL
100
330kHz
8.7nV/
√Hz AT 1kHz
5.3
VRMS
0.01
F
IN–
15V
8
1
–15V
+
+
1/2
LT1169
IC1
1/2
LT1169
IC1
IN+
R3
1k
R2
200
R1
1k
7
6
5
R4
1k
1
2
CL
3
+
1/2
LT1169
IC2
R5
1k
LT1169 TA03
VOUT
+
1/2 LT1169
C1
VIN
R2
1k
CL
R1
33
C1 = CL ≤ 0.1F
OUTPUT SHORT CIRCUIT CURRENT (
30mA) WILL LIMIT THE RATE
AT WHICH THE VOLTAGE CAN CHANGE ACROSS LARGE CAPACITORS
(I = C
dV
)
dt
LT1169 TA04
VOUT = 1M × (I1 – I2)
PD1,PD2 = HAMAMATSU S1336-5BK
WHEN EQUAL LIGHT ENTERS PHOTODIODES, VOUT < 3mV.
+
1/2 LT1169
R1
1M
C1
3pF TO 5pF
PD1
PD2
I1
I2
VOUT
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