Total Supply Voltage (V + to V " />
參數(shù)資料
型號: LT1193CN8#PBF
廠商: Linear Technology
文件頁數(shù): 5/12頁
文件大小: 0K
描述: IC AMP VIDEO DIF ADJ GAIN 8-DIP
標(biāo)準(zhǔn)包裝: 50
應(yīng)用: 差分
電路數(shù): 1
-3db帶寬: 80MHz
轉(zhuǎn)換速率: 500 V/µs
電流 - 電源: 35mA
電流 - 輸出 / 通道: 50mA
電壓 - 電源,單路/雙路(±): 4.75 V ~ 16 V,±2.38 V ~ 8 V
安裝類型: 通孔
封裝/外殼: 8-DIP(0.300",7.62mm)
供應(yīng)商設(shè)備封裝: 8-PDIP
包裝: 管件
產(chǎn)品目錄頁面: 1322 (CN2011-ZH PDF)
2
LT1193
1193fb
(Note 1)
Total Supply Voltage (V + to V ) .............................. 18V
Differential Input Voltage ........................................
± 6V
Input Voltage ..........................................................
± VS
Output Short-Circuit Duration (Note 2) ......... Continuous
Operating Temperature Range
LT1193M (OBSOLETE) ................ –55
°C to 125°C
LT1193C .................................................. 0
°C to 70°C
LT1193I ...............................................–40
°C to 85°C
Maximum Temperature ........................................ 150
°C
Storage Temperature Range ................. – 65
°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300
°C
LT1193CN8
LT1193CS8
LT1193IS8
ORDER PART
NUMBER
S8 PART MARKING
1193
1193I
ABSOLUTE
AXI U
RATI GS
W
WW
U
S8 PACKAGE
8-LEAD PLASTIC SO
N8 PACKAGE
8-LEAD PDIP
1
2
3
4
8
7
6
5
TOP VIEW
–/FB
V+
OUT
SHDN
+/REF
–IN
+IN
V
PACKAGE/ORDER I FOR ATIO
UU
W
TJMAX = 150°C, θJA = 100°C/W (N8)
TJMAX = 150°C, θJA = 150°C/W (S8)
LT1193MJ8
LT1193CJ8
OBSOLETE PACKAGE
J8 PACKAGE 8-LEAD CERDIP
TJMAX = 150°C, θJA = 100°C/W
Consider the N8 or S8 Packages for Alternate Source
Consult LTC Marketing for parts specified with wider operating temperature ranges.
LT1193M/C/I
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VOS
Input Offset Voltage
Both Inputs (Note 4) All Packages
2
12
mV
IOS
Input Offset Current
Either Input
0.2
3
A
IB
Input Bias Current
Either Input
±0.5
±3.5
A
en
Input Noise Voltage
fO = 10kHz
50
nV/
√Hz
in
Input Noise Current
fO = 10kHz
4
pA/
√Hz
RIN
Input Resistance
Either Input
100
k
CIN
Input Capacitance
Either Input
2
pF
VIN(LIM)
Input Voltage Limit
(Note 5)
1.3
V
Input Voltage Range
– 2.5
3.5
V
CMRR
Common Mode Rejection Ratio
VCM = – 2.5V to 3.5V
60
75
dB
PSRR
Power Supply Rejection Ratio
VS = ±2.375V to ±8V
60
75
dB
VOUT
Output Voltage Swing
VS = ±5V, RL = 1k
±3.8
±4V
VS = ±8V, RL = 1k
±6.8
±7V
VS = ±8V, RL = 100
6.4
6.6
V
GE
Gain Error
VO = ±3V, RL = 1k
0.1
1.0
%
RL = 100
0.1
1.2
%
SR
Slew Rate
VO = ±2V, RL = 300 (Notes 6, 11)
350
500
V/
s
FPBW
Full-Power Bandwidth
VO = 6VP-P (Note 7)
18.5
26.5
MHz
BW
Small-Signal Bandwidth
9
MHz
tr, tf
Rise Time, Fall Time
AV = 50, VO = ±1.5V, 20% to 80% (Note 11)
110
160
210
ns
tPD
Propagation Delay
RL= 1k, VO = ±125mV, 50% to 50%
15
ns
Overshoot
VO = ±50mV
0
%
ts
Settling Time
3V Step, 0.1% (Note 8)
180
ns
Diff AV
Differential Gain
RL = 150, AV = 2 (Note 9)
0.2
%
Diff Ph
Differential Phase
RL = 150, AV = 2 (Note 9)
0.08
DegP-P
VS = ±5V, VREF = 0V, RFB1 = 900 from Pins 6 to 8, RFB2 = 100 from Pin 8
to ground, RL = RFB1 + RFB2 = 1k (Note 3), TA = 25°C, CL ≤ 10pF, Pin 5 open circuit, unless otherwise noted.
ELECTRICAL C
C
HARA TERISTICS
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