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參數(shù)資料
| 型號： | LT1206CN8#PBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 18/18頁 |
| 文件大小： | 0K |
| 描述： | IC CURRNT FEEDBCK AMP 250MA 8DIP |
| 標(biāo)準(zhǔn)包裝： | 50 |
| 放大器類型： | 電流反饋 |
| 電路數(shù)： | 1 |
| 轉(zhuǎn)換速率： | 900 V/µs |
| -3db帶寬： | 60MHz |
| 電流 - 輸入偏壓： | 10µA |
| 電壓 - 輸入偏移： | 3000µV |
| 電流 - 電源： | 20mA |
| 電流 - 輸出 / 通道： | 1.2A |
| 電壓 - 電源，單路/雙路(±)： | 10 V ~ 30 V，±5 V ~ 15 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 8-DIP（0.300"，7.62mm） |
| 供應(yīng)商設(shè)備封裝： | 8-PDIP |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁面： | 1317 (CN2011-ZH PDF) |
LT1206
9
1206fb
applicaTions inForMaTion
is flat to 0.35dB to 30MHz. The network has the greatest
effect for CL in the range of 0pF to 1000pF. The graph of
Maximum Capacitive Load vs Feedback Resistor can be
used to select the appropriate value of feedback resistor.
The values shown are for 0.5dB and 5dB peaking at a gain
of 2 with no resistive load. This is a worst case condition,
as the amplifier is more stable at higher gains and with
some resistive load in parallel with the capacitance. Also
shownisthe–3dBbandwidthwiththesuggestedfeedback
resistor vs the load capacitance.
Although the optional compensation works well with ca-
pacitive loads, it simply reduces the bandwidth when it is
connected with resistive loads. For instance, with a 30Ω
load, the bandwidth drops from 55MHz to 35MHz when
the compensation is connected. Hence, the compensation
was made optional. To disconnect the optional compensa-
tion, leave the COMP pin open.
Shutdown/Current Set
If the shutdown feature is not used, the SHUTDOWN pin
must be connected to ground or V–.
The shutdown pin can be used to either turn off the bias-
ing for the amplifier, reducing the quiescent current to
less than 200A, or to control the quiescent current in
normal operation.
ThetotalbiascurrentintheLT1206iscontrolledbythecur-
rent flowing out of the shutdown pin. When the shutdown
pin is open or driven to the positive supply, the part is shut
down. In the shutdown mode, the output looks like a 40pF
capacitor and the supply current is typically 100A. The
shutdown pin is referenced to the positive supply through
an internal bias circuit (see the simplified schematic). An
easy way to force shutdown is to use open drain (collec-
tor) logic. The circuit shown in Figure 2 uses a 74C904
buffer to interface between 5V logic and the LT1206. The
switching time between the active and shutdown states
is less than 1s. A 24k pull-up resistor speeds up the
turn-off time and insures that the LT1206 is completely
turned off. Because the pin is referenced to the positive
supply, the logic used should have a breakdown voltage
of greater than the positive supply voltage. No other
circuitry is necessary as the internal circuit limits the
shutdown pin current to about 500A. Figure 3 shows
the resulting waveforms.
Figure 1
Figure 2. Shutdown Interface
Figure 3. Shutdown Operation
FREQUENCY (MHz)
1
–8
VOLTAGE
GAIN
(dB)
–4
0
4
8
10
100
1206 F01
–6
–2
2
6
10
12
VS = ±15V
RF = 1.2k
COMPENSATION
RF = 2k
NO COMPENSATION
RF = 2k
COMPENSATION
–
+
LT1206
S/D
15V
–15V
RF
RG
VIN
5V
24k
ENABLE
VOUT
1206 F02
15V
74C906
VOUT
ENABLE
AV = 1
RF = 825
RL = 50
RPU = 24k
VIN = 1VP-P
1s/DIV
1206 F03
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