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參數(shù)資料
| 型號(hào)： | LT1268B |
| 廠商： | Linear Technology Corporation |
| 元件分類： | 基準(zhǔn)電壓源/電流源 |
| 英文描述： | 500kHz and 1MHz High Efficiency 1.5A Switching Regulators; Package: SO; No of Pins: 8; Temperature Range: -40?°C to 85?°C |
| 中文描述： | 射頻放大器 |
| 文件頁數(shù)： | 3/4頁 |
| 文件大小： | 51K |
| 代理商： | LT1268B |
3
LT1268B/LT1268
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However,
no responsibility is assumed for its use. Linear Technology Corporation makes no representation that
the interconnection of its circuits as described herein will not infringe on existing patent rights.
SYMBOL
I
IN
I
SW
f
PARAMETER
Supply Current Increase
During Switch-ON Time
Switching Frequency
CONDITIONS
MIN
TYP
25
MAX
45
UNITS
mA/A
120
120
65
150
180
180
92
500
250
300
kHz
kHz
%
μ
A
mV
mV
G
DC
MAX
Maximum Switch Duty Cycle
Shutdown Mode Supply Current
Shutdown Mode Threshold Voltage
85
100
150
3V
≤
V
IN
≤
V
MAX
, V
C
= 0.05V
3V
≤
V
IN
≤
V
MAX
100
50
G
V
IN
= 15V, V
C
= 0.5V, V
FB
= V
REF
, switch pin open, unless otherwise noted.
ELECTRICAL C
HARA TERISTICS
The
G
denotes specifications which apply over the full operating
temperature range.
Note 1:
Measured with V
C
in hi clamp, V
FB
= 0.8V.
Note 2:
For duty cycles (DC) between 50% and 65%, minimum guaranteed
switch current is given by I
LIM
= 6.25 (1.7 – DC).
Note 3:
Minimum current limit is reduced by 0.5A at 125
°
C. 100
°
C test
limits are guaranteed by correlation to 125
°
C tests.
Note 4:
LT1268B reference voltage is specified at
±
9mV to guarantee
±
1%
output voltage accuracy when 0.1% external resistors are used to set
output voltage. To maintain output accuracy under load, load current
should be taken from the case and the ground pin should be connected
separately to output ground. See AN19 for details.
Note 5:
The Q package is intended for surface mount without a separate
heat sink. See graph for thermal resistance as a function of the mounting
area. This curve assumes no other heat dissipators adjacent to package.
Note 6:
Maximum switch current may be limited by package power
dissipation, especially for the surface mount (Q) package. This package
has a thermal resistance of 20
°
C/W to 50
°
C/W (see graph). The following
formula will allow an estimate of maximum continuous switch current as a
function of power loss and duty cycle. See AN19 for more details.
I
MAX
=
P
R
SW
×
DC
P = Power dissipation due to switch current
R
SW
= Switch-ON resistance
≈
0.15
DC = Switch duty cycle
In a typical application where thermal resistance is 30
°
C/W, maximum
power might be limited to 2W and power allocated to switch loss is 1.5W.
For a duty cycle of 40%, this yields
I
MAX
=
= 5A
1.5
0.15
×
0.4
Obviously, a combination of high thermal resistance and high duty cycle
may restrict switch current to a value well below the 7.5A electrical limit.
TYPICAL PERFOR A CE CHARACTERISTICS
W U
DUTY CYCLE (%)
0
S
18
24
80
LT1268 TPC01
12
6
0
20
40
60
100
70
10
30
50
90
–55°C
125°C
25°C
Switch Current Limit vs Duty Cycle
TOP SURFACE COPPER AREA (cm
2
)
0
0
θ
10
20
30
40
60
5
10
15
20
LT1268 603
25
30
50
SINGLE-SIDED BOARD, 1oz COPPER
DOUBLE-SIDED BOARD, 1oz COPPER
BOTTOM COPPER AREA >100cm
2
SWITCH CURRENT (A)
0
S
1.2
1.6
8
LT1268 TPC02
0.8
0.4
1.0
1.4
0.6
0.2
0
2
4
6
10
7
1
3
5
9
T
J
= 25°C
Switch Saturation Voltage
Q Package Thermal Resistance
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