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參數(shù)資料
| 型號： | LT1336CN |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | MOSFETs |
| 英文描述： | Octal D-Type Edge-Triggered Flip-Flops With 3-State Outputs 20-PDIP 0 to 70 |
| 中文描述： | 1.5 A HALF BRDG BASED MOSFET DRIVER, PDIP16 |
| 封裝： | 0.300 INCH, PLASTIC, DIP-16 |
| 文件頁數(shù)： | 9/16頁 |
| 文件大?。?/td> | 365K |
| 代理商： | LT1336CN |
9
LT1336
floating supply. This allows the output to smoothly transi-
tion to 100% duty cycle.
An undervoltage detection circuit disables both channels
when V
+
is below the undervoltage trip point. A separate
undervoltage detect block disables the high side channel
when V
BOOST
– V
TSOURCE
is below 9V.
The top and bottom gate drivers in the LT1336 each utilize
two gate connections: 1) a Gate Drive pin, which provides
the turn-on and turn-off currents through an optional
series gate resistor, and 2) a Gate Feedback pin which
connects directly to the gate to monitor the gate-to-source
voltage.
Whenever there is an input transition to command the
outputs to change states, the LT1336 follows a logical
sequence to turn off one MOSFET and turn on the other.
First, turn-off is initiated, then V
GS
is monitored until it has
decreased below the turn-off threshold, and finally the
other gate is turned on.
The LT1336 incorporates two independent driver chan-
nels with separate inputs and outputs. The inputs are
TTL/CMOS compatible; they can withstand input voltages
as high as V
+
. The 1.4V input threshold is regulated and
has 300mV of hysteresis. Both channels are noninverting
drivers. The internal logic prevents both outputs from
simultaneously turning on under any input conditions.
When both inputs are high both outputs are actively
held low.
An internal switching regulator permits smooth transition
from PWM to DC operation. In PWM operation the boot-
strap capacitor is recharged each time Top Source pin
goes low. As the duty cycle approaches 100% the output
pulse width becomes narrower and the time available to
produce an elevated upper MOSFET gate supply becomes
shorter than required. As the voltage across the bootstrap
capacitor drops below 10.6V, an inductor-based switch-
ing regulator kicks in and takes over the charging of the
OPERATIOU
(Refer to Functional Diagram)
APPLICATIO
S I
N
FOR
ATIO
U
Deriving the Floating Supply
In a typical half-bridge driver like the LT1158 or the
LT1160, the floating supply for the topside driver is
provided by a bootstrap capacitor. This capacitor is re-
charged each time its negative plate goes low in PWM
operation. As the duty cycle approaches 100% the output
pulse width becomes narrower and the time available to
recharge the bootstrap capacitor becomes shorter than
required (1
μ
s to 2
μ
s). For instance, at 100kHz and at 95%
duty cycle the output pulse width is only 0.5
μ
s; clearly this
is insufficient time to recharge the capacitor by
bootstrapping. To get around this problem, the LT1336
incorporates a switching regulator to help recharge the
bootstrap capacitor under such extreme conditions.
The LT1336 provides all the necessary circuitry to con-
struct a boost or flyback switching regulator. This regula-
tor can charge the bootstrap capacitor when it cannot
recharge by bootstrapping. This happens when nearing
100% duty cycle in PWM applications. This is a worst-
case condition because the bootstrap capacitor must still
provide for the gate charging current of the high side
W
U
MOSFETs. A diode connected between V
+
and the Boost
pin is still needed to allow conventional bootstrapping of
the bootstrap capacitor when duty cycles are below 90%.
The LT1336’s internal switching regulator can provide
enough charge to the bootstrap capacitor to allow the top
driver to drive several power MOSFETs in parallel at its
maximum operating frequency. The regulated voltage
across V
BOOST
– V
TSOURCE
is 10.6V; when this voltage is
exceeded due to normal bootstrap action, the regulator
automatically shuts down.
The switching regulator uses a hysteretic current mode
control. This method of control is simple, inherently stable
and provides peak inductor current limit in every cycle. It
is designed to run at a nominal frequency of around
700kHz which is 7
×
the maximum PWM operating fre-
quency of the LT1336. Since the hysteretic current mode
control has no internal oscillator, the frequency is deter-
mined by external conditions such as supply voltage and
load currents and external components such as inductor
value and current sense resistor value.
相關PDF資料 |
PDF描述 |
|---|---|
| LT1336CS | Half-Bridge N-Channel Power MOSFET Driver with Boost Regulator |
| LT1336IN | Octal D-Type Edge-Triggered Flip-Flops With 3-State Outputs 20-PDIP 0 to 70 |
| LT1336IS | Octal D-Type Edge-Triggered Flip-Flops With 3-State Outputs 20-SO 0 to 70 |
| LT1339C | Octal Buffers/Drivers With 3-State Outputs 20-SOIC 0 to 70 |
| LT1339 | High Efficiency, Synchronous, 4-Switch Buck-Boost Controller |
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