參數(shù)資料
型號: LT1376I
廠商: Linear Technology Corporation
英文描述: Octal D-Type Edge-Triggered Flip-Flops with 3-State Outputs 20-SOIC 0 to 70
中文描述: 1.5A的,500kHz降壓型開關穩(wěn)壓器
文件頁數(shù): 23/28頁
文件大?。?/td> 232K
代理商: LT1376I
23
LT1375/LT1376
APPLICATIO
S I
FOR
ATIO
U
W
U
U
Keep in mind that this procedure does not take initial
component tolerance into account. You should see fairly
clean response under all load and line conditions to ensure
that component variations will not cause problems. One
note here: according to Murphy, the component most
likely to be changed in production is the output capacitor,
because that is the component most likely to have manu-
facturer variations (in ESR) large enough to cause prob-
lems. It would be a wise move to lock down the sources of
the output capacitor in production.
A possible exception to the “clean response” rule is at very
light loads, as evidenced in Figure 17 with I
LOAD
= 50mA.
Switching regulators tend to have dramatic shifts in loop
response at very light loads, mostly because the inductor
current becomes discontinuous. One common result is
very slow but stable characteristics. A second possibility
is low phase margin, as evidenced by ringing at the output
with transients. The good news is that the low phase
margin at light loads is not particularly sensitive to com-
ponent variation, so if it looks reasonable under a transient
test, it will probably not be a problem in production. Note
that frequencyof the light load ringing may vary with
component tolerance but phase margin generally hangs in
there.
THERMAL CALCULATIONS
Power dissipation in the LT1376 chip comes from four
sources: switch DC loss, switch AC loss, boost circuit
current, and input quiescent current. The following formu-
las show how to calculate each of these losses. These
formulas assume continuous mode operation, so they
should not be used for calculating efficiency at light load
currents.
Switch loss:
P
R
V
V
ns I
V
f
SW
SW OUT
OUT
IN
OUT
IN
=
) (
)
+
(
)( )( )
2
16
Boost current loss:
P
V
I
V
BOOST
OUT
OUT
IN
=
+
(
)
2
0008
75
/
Quiescent current loss:
P
V
V
V
V
Q
IN
OUT
OUT
IN
=
(
)
+
(
)
+
(
)
0001
0005
0002
2
R
SW
= Switch resistance (
0.4)
16ns = Equivalent switch current/voltage overlap time
f = Switch frequency
Example: with V
IN
= 10V, V
OUT
= 5V and I
OUT
= 1A:
P
W
P
W
P
W
SW
BOOST
Q
=
( )( ) ( )
+
10
02 008
2
( )( )
=
=
=
( )
(
)
=
=
(
)
+
(
)
+
( ) (
)
=
04 1
.
5
16 10
·
1 10 500 10
028
.
5
0008 1 75
.
10
0053
.
10 0001
5 0005
.
5
0002
.
10
004
.
2
9
3
2
·
.
.
/
.
Total power dissipation is 0.28 + 0.053 + 0.04 = 0.37W.
Thermal resistance for LT1376 package is influenced by
the presence of internal or backside planes. With a full
plane under the SO package, thermal resistance will be
about 120
°
C/W. No plane will increase resistance to about
160
°
C/W. To calculate die temperature, use the proper
thermal resistance number for the desired package and
add in worst-case ambient temperature:
T
J
= T
A
+
θ
JA
(P
TOT
)
With the SO-8 package (
θ
JA
= 120
°
C/W), at an ambient
temperature of 70
°
C,
T
J
= 70 + 120 (0.37) = 114.4
°
C
Die temperature is highest at low input voltage, so use
lowest continuous input operating voltage for thermal
calculations.
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LT1376IS8-5 RADIATION HARDENED HIGH EFFICIENCY, 5 AMP SWITCHING REGULATORS
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