參數(shù)資料
型號(hào)： LT1425IS
廠商： LINEAR TECHNOLOGY CORP
元件分類： 穩(wěn)壓器
英文描述： Isolated Flyback Switching Regulator with 9V Output
中文描述： 1.9 A SWITCHING REGULATOR, 320 kHz SWITCHING FREQ-MAX, PDSO16
封裝： 0.150 INCH, PLASTIC, SOP-16
文件頁(yè)數(shù)： 14/20頁(yè)
文件大小： 341K
代理商： LT1425IS
14
LT1425
APPLICATIO
S I
N
FOR
ATIO
U
V
F
of this diode should therefore be included in R
FB
calculations. Lot-to-lot and ambient temperature varia-
tions will show up as output voltage shift/drift.
W
U
“collapse,” thereby supporting operation well into discon-
tinuous mode. Nevertheless, there still remain constraints
to ultimate low load operation. They relate to the minimum
switch ON time and the minimum enable time. Discontinu-
ous mode operation will be assumed in the following
theoretical derivations.
As outlined in the Operation section, the LT1425 utilizes a
minimum output switch ON time, t
ON
. This value can be
combined with expected V
IN
and switching frequency to
yield an expression for minimum delivered power.
2
)
= (V
OUT
)(I
OUT
)
1
f
L
PRI
)
)
Min Power =
(V
IN
t
ON
)
2
This expression then yields a minimum output current
constraint:
)
where,
f = Switching frequency (nominally 285kHz)
L
PRI
= Transformer primary side inductance
V
IN
= Input voltage
V
OUT
= Output voltage
t
ON
= Output switch minimum ON time
1
2
)
f
(L
PRI
)(V
OUT
)
)
I
OUT(MIN)
=
(V
IN
t
ON
)
2
An additional constraint has to do with the minimum
enable time. The LT1425 derives its output voltage infor-
mation from the flyback pulse. If the internal minimum
enable time pulse extends beyond the flyback pulse, loss
of regulation will occur. The onset of this condition can be
determined by setting the width of the flyback pulse equal
to the sum of the flyback enable delay, t
ED
, plus the
minimum enable time, t
EN
. Minimum power delivered to
the load is then:
2
)
= (V
OUT
)(I
OUT
)
1
f
L
SEC
)
)
Min Power =
[V
OUT
(t
EN
+ t
ED
)]
2
which yields a minimum output constraint:
Secondary Leakage Inductance
Leakage inductance on the transformer secondary
reduces the effective primary-to-secondary turns ratio
(N
P
/N
S
) from its ideal value. This will increase the output
voltage target by a similar percentage. To the extent that
secondary leakage inductance is constant from part-to-
part, this can be accommodated by adjusting the R
FB
to
R
REF
resistor ratio.
Output Impedance Error
An additional error source is caused by transformer sec-
ondary current flow through the real life nonzero imped-
ances of the output rectifier, transformer secondary and
output capacitor. Because the secondary current only
flows during the off portion of the duty cycle, the effective
output impedance equals the “DC” lumped secondary
impedance times the inverse of the off duty cycle. If the
output load current remains relatively constant, or, in less
critical applications, the error may be judged acceptable
and the R
FB
value adjusted for nominal expected error. In
more demanding applications, output impedance error
may be minimized by the use of the load compensation
function (see Load Compensation).
V
IN
Sense Error
The LT1425 determines the size of the flyback pulse by
comparing the V
SW
signal to V
IN
, through R
FB
. This
comparison is not perfect, in the sense that an offset exists
between the sensing mechanism and the actual V
IN
. This
is expressed in the data sheet as V
IN
sense error. This error
is fixed in absolute millivolt terms relative to V
OUT
(with the
exception that it is reflected to V
OUT
by any nonunity
secondary-to-primary turns ratio).
MINIMUM LOAD CONSIDERATIONS
The LT1425 generally provides better low load perfor-
mance than previous generation switcher/controllers
utilizing indirect output voltage sensing techniques.
Specifically, it contains circuitry to detect flyback pulse
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