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參數(shù)資料
| 型號： | LT1469 |
| 廠商： | Linear Technology Corporation |
| 英文描述： | Dual 90MHz, 22V/us 16-Bit Accurate Operational Amplifier |
| 中文描述： | 雙90MHz的，22V/us 16位精度運算放大器 |
| 文件頁數(shù)： | 3/12頁 |
| 文件大小： | 179K |
| 代理商： | LT1469 |
LT1469
3
SYMBOL
SR
PARAMETER
Slew Rate
CONDITIONS
A
V
= –10, R
L
= 2k (Note 6)
V
SUPPLY
±
15V
±
5V
±
15V
±
5V
±
15V
±
5V
±
15V
±
5V
±
15V
±
5V
±
15V
±
5V
±
15V
±
15V
±
5V
±
15V
±
15V
±
15V
±
5V
±
15V
±
5V
±
15V
±
5V
±
5V to
±
15V
±
5V to
±
15V
±
15V
±
5V
MIN
15
11
TYP
22
17
350
900
90
88
11
12
30
35
9
10
760
900
770
–96.5
0.02
120
120
4.1
3.8
MAX
UNITS
V/
μ
s
V/
μ
s
kHz
kHz
MHz
MHz
ELECTRICAL CHARACTERISTICS
T
A
= 25
°
C, V
CM
= 0V unless otherwise noted.
SYMBOL
V
OS
PARAMETER
Input Offset Voltage
CONDITIONS
V
SUPPLY
±
15V
±
5V
±
5V to
±
15V
±
5V to
±
15V
±
5V to
±
15V
±
5V to
±
15V
±
5V to
±
15V
±
5V to
±
15V
±
15V
±
5V
±
15V
±
5V
±
15V
±
5V
MIN
TYP
MAX
350
350
3
±
80
UNITS
G
G
μ
V
μ
V
V
OS
/
T
I
OS
I
OS
/
T
I
B
–
I
B
–/
T
I
B
+
V
CM
Input Offset Voltage Drift
Input Offset Current
Input Offset Current Drift
Inverting Input Bias Current
Inverting Input Bias Current Drift
Noninverting Input Bias Current
Input Voltage Range (Positive)
(Note 8)
G
1
μ
V/
°
C
G
nA
(Note 8)
G
60
pA/
°
C
G
±
20
nA
(Note 8)
G
40
pA/
°
C
G
±
60
nA
V
V
V
V
dB
dB
G
G
12.5
2.5
Input Voltage Range (Negative)
G
G
–12.5
–2.5
CMRR
Common Mode Rejection Ratio
V
CM
=
±
12.5V
V
CM
=
±
2.5V
G
G
94
94
FPBW
Full-Power Bandwidth
10V Peak, (Note 7)
3V Peak, (Note 7)
f = 100kHz, R
L
= 2k
GBW
Gain Bandwidth Product
60
55
t
r
, t
f
Rise Time, Fall Time
A
V
= 1, 10% to 90%, 0.1V
ns
ns
%
%
ns
ns
ns
ns
ns
dB
dB
dB
mA
mA
μ
V
μ
V
nA
nA
dB
dB
dB
OS
Overshoot
A
V
= 1, 0.1V
t
PD
Propagation Delay
A
V
= 1, 50% V
IN
to 50% V
OUT
, 0.1V
t
S
Settling Time
10V Step, 0.01%, A
V
= –1
10V Step, 150
μ
V, A
V
= –1
5V Step, 0.01%, A
V
= –1
A
V
= 1, 10V
P-P
, 100kHz
A
V
= 1, f = 100kHz
V
OUT
=
±
12.5V, R
L
= 2k
V
OUT
=
±
2.5V, R
L
= 2k
Per Amplifier
THD
R
Total Harmonic Distortion
Output Resistance
Channel Separation
100
100
I
S
Supply Current
5.2
5
225
350
±
18
±
78
V
OS
Input Offset Voltage Match
I
B
–
I
B
+
CMRR
Inverting Input Bias Current Match
Noninverting Input Bias Current Match
Common Mode Rejection Match
V
CM
=
±
12.5V (Note 9)
V
CM
=
±
2.5V (Note 9)
V
S
=
±
4.5V to
±
15V (Note 9)
93
93
97
PSRR
Power Supply Rejection Match
The
G
denotes the specifications which apply over the temperature range 0
°
C
≤
T
A
≤
70
°
C, V
CM
= 0V unless otherwise noted.
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