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參數(shù)資料
| 型號： | LT1671IS8#PBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 6/12頁 |
| 文件大小： | 0K |
| 描述： | IC COMPARATOR 60NS LOW PWR 8SOIC |
| 標準包裝： | 100 |
| 類型： | 帶鎖銷 |
| 元件數(shù)： | 1 |
| 輸出類型： | CMOS，補充型，TTL |
| 電壓 - 輸入偏移（最小值）： | 2.5mV @ ±5V |
| 電流 - 輸入偏壓（最小值）： | 0.28µA @ ±5V |
| 電流 - 輸出（標準）： | 20mA |
| 電流 - 靜態(tài)（最大值）： | 800µA |
| CMRR, PSRR（標準）： | 100dB CMRR，85dB PSRR |
| 傳輸延遲（最大）： | 80ns |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 安裝類型： | 表面貼裝 |
| 包裝： | 管件 |
3
LT1671
ELECTRICAL CHARACTERISTICS
The q denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25°C.
V+ = 5V, V– = – 5V, VOUT(Q) = 1.4V, VLATCH = VCM = 0V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VOH
Output Voltage Swing High
V +
≥ 4.6V, IOUT = 400A
q
2.7
3.1
V
V +
≥ 4.6V, IOUT = 4mA
q
2.4
3.0
V
VOL
Output Voltage Swing Low
IOUT = – 400A
q
0.3
0.5
V
IOUT = – 4mA
0.4
V
I+
Positive Supply Current
450
800
A
q
1000
A
I–
Negative Supply Current
75
200
A
q
250
A
VIH
LATCH Pin High Input Voltage
q
2V
VIL
LATCH Pin Low Input Voltage
q
0.8
V
IIL
LATCH Pin Current
VLATCH = 0V
q
– 1000
– 250
nA
tPD1
Propagation Delay
VIN = 100mV, VOD = 20mV
60
80
ns
q
110
ns
tPD2
Propagation Delay (Note 7)
VIN = 100mV, VOD = 5mV
85
100
ns
q
130
ns
tPD
Differential Propagation Delay (Note 7)
VIN = 100mV, VOD = 5mV
15
30
ns
tLPD
Latch Propagation Delay (Note 8)
60
ns
tSU
Latch Setup Time (Note 8)
–15
ns
tH
Latch Hold Time (Note 8)
35
ns
tPW(D)
Minimum Disable Pulse Width
30
ns
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: This parameter is guaranteed to meet specified performance
through design and characterization. It has not been tested.
Note 3: The LT1671CS8 and LT1671CMS8 are guaranteed to meet
specified performance from 0
°C to 70°C and are designed, characterized
and expected to meet these extended temperature limits, but are not tested
at – 40
°C and 85°C. The LT1671IS8 is guaranteed to meet the extended
temperature limits.
Note 4: Input offset voltage (VOS) is defined as the average of the two
voltages measured by forcing first one output, then the other to 1.4V.
Note 5: Input bias current (IB) is defined as the average of the two input
currents.
Note 6: Input voltage range is guaranteed in part by CMRR testing and in
part by design and characterization.
Note 7: tPD and tPD cannot be measured in automatic handling
equipment with low values of overdrive. The LT1671 is 100% tested with a
100mV step and 20mV overdrive. Correlation tests have shown that tPD
and
tPD limits can be guaranteed with this test, if additional DC tests are
performed to guarantee that all internal bias conditions are correct.
Propagation delay (tPD) is measured with the overdrive added to the actual
VOS. Differential propagation delay is defined as:
tPD = tPDLH – tPDHL
Note 8: Latch propagation delay (tLPD) is the delay time for the output to
respond when the LATCH pin is deasserted. Latch setup time (tSU) is the
interval in which the input signal must remain stable prior to asserting the
latch signal. Latch hold time (tH) is the interval after the latch is asserted in
which the input signal must remain stable.
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參數(shù)描述 |
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| LT1672CMS8 | 功能描述:IC OPAMP R-R IN/OUT SNGL 8-MSOP RoHS:否 類別:集成電路 (IC) >> Linear - Amplifiers - Instrumentation 系列:Over-The-Top® 標準包裝:1,000 系列:- 放大器類型:電壓反饋 電路數(shù):4 輸出類型:滿擺幅 轉換速率:33 V/µs 增益帶寬積:20MHz -3db帶寬:30MHz 電流 - 輸入偏壓:2nA 電壓 - 輸入偏移:3000µV 電流 - 電源:2.5mA 電流 - 輸出 / 通道:30mA 電壓 - 電源，單路/雙路(±):4.5 V ~ 16.5 V，±2.25 V ~ 8.25 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:14-SOIC（0.154"，3.90mm 寬） 供應商設備封裝:14-SOIC 包裝:帶卷 (TR) |
| LT1672CMS8#PBF | 功能描述:IC OPAMP R-R IN/OUT SNGL 8-MSOP RoHS:是 類別:集成電路 (IC) >> Linear - Amplifiers - Instrumentation 系列:Over-The-Top® 標準包裝:2,500 系列:- 放大器類型:通用 電路數(shù):1 輸出類型:滿擺幅 轉換速率:0.11 V/µs 增益帶寬積:350kHz -3db帶寬:- 電流 - 輸入偏壓:4nA 電壓 - 輸入偏移:20µV 電流 - 電源:260µA 電流 - 輸出 / 通道:20mA 電壓 - 電源，單路/雙路(±):2.7 V ~ 36 V，±1.35 V ~ 18 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 供應商設備封裝:8-SO 包裝:帶卷 (TR) |
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