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參數(shù)資料
| 型號(hào)： | LT1684IS#PBF |
| 廠商： | Linear Technology |
| 文件頁(yè)數(shù)： | 13/16頁(yè) |
| 文件大小： | 0K |
| 描述： | IC RING TONE GENERATOR 14-SOIC |
| 標(biāo)準(zhǔn)包裝： | 55 |
| 功能： | 音頻發(fā)生器 |
| 電路數(shù)： | 1 |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 14-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 14-SOIC |
| 包裝： | 管件 |
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LT1684
BGOUT (Pin 13): Normalized PWM Buffered Output. PWM
differential input is amplitude normalized to
±1.25V (refer-
enced to the OUT pin). This signal is used to drive the
active filter/amplifier. Filter resistor values must be chosen
to limit the maximum current load on this pin to less than
2mA. The output is current limit protected to a typical value
of
±4.5mA.
IN A (Pin 14): PWM Positive Input. Input is isolated from
digital source by ~100pF series capacitor. A 10k resistor
should be connected to the IN A pin in series with the
isolation capacitor for transient protection. The PWM
receiver implements a diode forward drop of input hyster-
esis (relative to IN B). This hysteresis and internal signal
limiting assure common mode glitch rejection with isola-
tion capacitor mismatches up to 2:1. For maximum perfor-
mance, however, effort should be made to match the two
PWM input isolation capacitors. Pin IN A is differentially
clamped to pin IN B through back-to back isolation-base
diodes. This results in a high impedance differential input
±100mV beyond the input thresholds. 5k internal input
resistors yield a 10k (nominal) differential overdrive im-
pedance.
LT1684 Block Diagram
–
+
5k
10k
IN A
100pF
+
5k
10k
IN B
100pF
–
PWM
INPUT
5k
AMPIN
20pF
(RING RETURN)
100pF
FILTER
ELEMENTS
BGOUT
COMP1
COMP2
RING
OUTPUT
15k
CURRENT
LIMIT
GATE–
LIM–
V–
V –
V+
OUT
LIM+
ATREF
14V
GATE+
V+
1684 BD
1.25V
–1.25V
UU
U
PI FU CTIO S
FUNCTIONAL BLOCK DIAGRA
UU
W
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