參數(shù)資料
型號(hào): LT1713CMS8
廠商: Linear Technology
文件頁(yè)數(shù): 7/16頁(yè)
文件大小: 0K
描述: IC COMP R-R I/O SINGLE LP 8MSOP
標(biāo)準(zhǔn)包裝: 50
系列: UltraFast™
類型: 帶鎖銷
元件數(shù): 1
輸出類型: CMOS,補(bǔ)充型,滿擺幅,TTL
電壓 - 電源,單路/雙路(±): 2.4 V ~ 12 V,±2.4 V ~ 6 V
電壓 - 輸入偏移(最小值): 4mV @ 5V
電流 - 輸入偏壓(最小值): 2µA @ 5V
電流 - 輸出(標(biāo)準(zhǔn)): 20mA
電流 - 靜態(tài)(最大值): 7.5mA
CMRR, PSRR(標(biāo)準(zhǔn)): 70dB CMRR,80dB PSRR
傳輸延遲(最大): 11ns
磁滯: 100mV
工作溫度: -40°C ~ 85°C
封裝/外殼: 8-TSSOP,8-MSOP(0.118",3.00mm 寬)
安裝類型: 表面貼裝
包裝: 管件
15
LT1713/LT1714
GN Package
16-Lead Plastic SSOP (Narrow 0.150)
(LTC DWG # 05-08-1641)
Dimensions in inches (millimeters) unless otherwise noted.
U
PACKAGE DESCRIPTIO
GN16 (SSOP) 1098
* DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
12
3
4
5
6
7
8
0.229 – 0.244
(5.817 – 6.198)
0.150 – 0.157**
(3.810 – 3.988)
16 15 14 13
0.189 – 0.196*
(4.801 – 4.978)
12 11 10 9
0.016 – 0.050
(0.406 – 1.270)
0.015
± 0.004
(0.38
± 0.10)
× 45°
0
° – 8° TYP
0.007 – 0.0098
(0.178 – 0.249)
0.053 – 0.068
(1.351 – 1.727)
0.008 – 0.012
(0.203 – 0.305)
0.004 – 0.0098
(0.102 – 0.249)
0.0250
(0.635)
BSC
0.009
(0.229)
REF
U
TYPICAL APPLICATIO
Rail-to-Rail Pulse Width Modulator
Using the LT1714
Binary modulation schemes are used in order to improve
efficiency and reduce physical circuit size. They do this by
reducing the power dissipation in the output driver tran-
sistors. In a normal Class A or Class AB amplifier, voltage
drop and current flow exist simultaneously in the output
transistors and power losses proportional to V I occur.
In a binary modulation scheme, the output transistors,
whether bipolar or FET, are switched hard-on and hard-off
so that voltage drops do not occur simultaneously with
current flow. The circuit of Figure 9 shows an example of
a binary modulation scheme, in this case pulse width
modulation.
The LT1809 is configured as an integrator in order to
generate nice linear rail-to-rail voltage ramps. The polarity
of the ramp is determined by the output of the LT1714’s
comparator A into R4. The heavy hysteresis of R1 around
the LT1714’s comparator A combined with the feedback of
the LT1809 force the devices to perpetually reverse each
other, resulting in a 1MHz triangle wave. This constitutes
the usual first half of any pulse width modulator, but the
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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