- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄10700 > LT1719CS6#TRM (Linear Technology)IC COMP R-RINOUT SINGLE SOT23-6 PDF資料下載
| 型號(hào)： | LT1719CS6#TRM |
| 廠商： | Linear Technology |
| 文件頁(yè)數(shù)： | 2/22頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC COMP R-RINOUT SINGLE SOT23-6 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | UltraFast™ |
| 類型： | 通用 |
| 元件數(shù)： | 1 |
| 輸出類型： | CMOS，滿擺幅，TTL |
| 電壓 - 電源，單路/雙路(±)： | 2.7 V ~ 6 V |
| 電壓 - 輸入偏移（最小值）： | 2.5mV @ 5V |
| 電流 - 輸入偏壓（最小值）： | 6µA @ 5V |
| 電流 - 輸出（標(biāo)準(zhǔn)）： | 20mA |
| 電流 - 靜態(tài)（最大值）： | 9mA |
| CMRR, PSRR（標(biāo)準(zhǔn)）： | 65dB CMRR，80dB PSRR |
| 傳輸延遲（最大）： | 13ns |
| 磁滯： | 7mV |
| 工作溫度： | 0°C ~ 70°C |
| 封裝/外殼： | SOT-23-6 |
| 安裝類型： | 表面貼裝 |
| 包裝： | 剪切帶 (CT) |
| 其它名稱： | LT1719CS6 LT1719CS6#TRMCT LT1719CS6-ND |
第1頁(yè)當(dāng)前第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)
LT1719
10
1719fa
APPLICATIONS INFORMATION
The propagation delay does not increase signicantly when
driven with large differential voltages, but with low levels
of overdrive, an apparent increase may be seen with large
source resistances due to an RC delay caused by the 2pF
typical input capacitance.
Input Protection
The input stage is protected against damage from large
differential signals, up to and beyond a differential voltage
equal to the supply voltage, limited only by the absolute
maximum currents noted. External input protection cir-
cuitry is only needed if currents would otherwise exceed
these absolute maximums. The internal catch diodes can
conduct current up to these rated maximums without
latchup, even when the supply voltage is at the absolute
maximum rating.
The LT1719 input stage has general purpose internal ESD
protection for the human body model. For use as a line
receiver, additional external protection may be required.
As with most integrated circuits, the level of immunity to
ESD is much greater when residing on a printed circuit
board where the power supply decoupling capacitance will
limit the voltage rise caused by an ESD pulse.
Input Bias Current
Input bias current is measured with both inputs held at
1V. As with any PNP differential input stage, the LT1719
bias current ows out of the device. It will go to zero
on the higher of the two inputs and double on the lower
of the two inputs. With more than two diode drops of
differential input voltage, the LT1719’s input protection
circuitry activates, and current out of the lower input will
increase an additional 30% and there will be a small bias
current into the higher of the two input pins, of 4μA or
less. See the Typical Performance curve Input Current vs
Differential Input Voltage.
High Speed Design Considerations
Application of high speed comparators is often plagued by
oscillations. The LT1719 has 4mV of internal hysteresis,
which will prevent oscillations as long as parasitic output
to input feedback is kept below 4mV. However, with the
2V/ns slew rate of the LT1719 outputs, a 4mV step can
be created at a 100Ω input source with only 0.02pF of
output to input coupling. The LT1719’s pinout has been
arranged to minimize problems by placing the sensitive
inputs away from the outputs, shielded by the power rails.
The input and output traces of the circuit board should
also be separated, and the requisite level of isolation is
readily achieved if a topside ground plane runs between
the output and the inputs. For multilayer boards where the
ground plane is internal, a topside ground or supply trace
should be run between the inputs and the output.
Figure 2 shows a typical topside layout of the LT1719S8
on such a multilayer board. Shown is the topside metal
etch including traces, pin escape vias, and the land pads
for an SO-8 LT1719 and its adjacent X7R 10nF bypass
capacitors in the 1206 case. The same principles should
be used with the SOT 23-6.
1719 F02
Figure 2. Typical Topside Metal for Multilayer PCB Layouts
The ground trace from Pin 5 runs under the device up
to the bypass capacitor, shielding the inputs from the
outputs. Note the use of a common via for the LT1719
and the bypass capacitors, which minimizes interference
from high frequency energy running around the ground
plane or power distribution traces.
The supply bypass should include an adjacent
10nF ceramic capacitor and a 2.2μF tantalum capacitor
no farther than 5cm away; use more capacitance on + VS
if driving more than 4mA loads. To prevent oscillations,
it is helpful to balance the impedance at the inverting and
noninverting inputs; source impedances should be kept
low, preferably 1kΩ or less.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LT6700CDCB-2#TRPBF | IC COMP DUAL 400MV REF 6-DFN |
| VE-243-IX-B1 | CONVERTER MOD DC/DC 24V 75W |
| VE-JWZ-MY-F1 | CONVERTER MOD DC/DC 2V 20W |
| LT6700CDCB-1#TRPBF | IC COMP DUAL 400MV REF 6-DFN |
| VE-241-IX-B1 | CONVERTER MOD DC/DC 12V 75W |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LT1719CS6TRMPBF | 制造商:Linear Technology 功能描述:Comparator Single RRO +/-3V/6V TSOT23-6 |
| LT1719CS8 | 功能描述:IC COMP R-R I/O SGL 3/5V 8-SOIC RoHS:否 類別:集成電路 (IC) >> 線性 - 比較器 系列:UltraFast™ 標(biāo)準(zhǔn)包裝:25 系列:- 類型:帶電壓基準(zhǔn) 元件數(shù):4 輸出類型:CMOS，開(kāi)路漏極，TTL 電壓 - 電源，單路/雙路(±):2 V ~ 11 V，±1 V ~ 5.5 V 電壓 - 輸入偏移（最小值）:10mV @ 5V 電流 - 輸入偏壓（最小值）:- 電流 - 輸出（標(biāo)準(zhǔn)）:0.015mA @ 5V 電流 - 靜態(tài)（最大值）:8.5µA CMRR, PSRR（標(biāo)準(zhǔn)）:80dB CMRR，80dB PSRR 傳輸延遲（最大）:12µs 磁滯:50mV 工作溫度:0°C ~ 70°C 封裝/外殼:16-DIP（0.300"，7.62mm） 安裝類型:通孔 包裝:管件 |
| LT1719CS8#PBF | 功能描述:IC COMP R-R I/O SGL 3/5V 8-SOIC RoHS:是 類別:集成電路 (IC) >> 線性 - 比較器 系列:UltraFast™ 標(biāo)準(zhǔn)包裝:1 系列:- 類型:通用 元件數(shù):1 輸出類型:CMOS，開(kāi)路集電極，TTL 電壓 - 電源，單路/雙路(±):2.7 V ~ 5.5 V 電壓 - 輸入偏移（最小值）:7mV @ 5V 電流 - 輸入偏壓（最小值）:0.25µA @ 5V 電流 - 輸出（標(biāo)準(zhǔn)）:84mA @ 5V 電流 - 靜態(tài)（最大值）:120µA CMRR, PSRR（標(biāo)準(zhǔn)）:- 傳輸延遲（最大）:600ns 磁滯:- 工作溫度:-40°C ~ 85°C 封裝/外殼:SC-74A，SOT-753 安裝類型:表面貼裝 包裝:剪切帶 (CT) 產(chǎn)品目錄頁(yè)面:1268 (CN2011-ZH PDF) 其它名稱:*LMV331M5*LMV331M5/NOPBLMV331M5CT |
| LT1719CS8#TR | 功能描述:IC COMP R-R SINGLE 4.5NS 8SOIC RoHS:否 類別:集成電路 (IC) >> 線性 - 比較器 系列:UltraFast™ 標(biāo)準(zhǔn)包裝:25 系列:- 類型:帶電壓基準(zhǔn) 元件數(shù):4 輸出類型:CMOS，開(kāi)路漏極，TTL 電壓 - 電源，單路/雙路(±):2 V ~ 11 V，±1 V ~ 5.5 V 電壓 - 輸入偏移（最小值）:10mV @ 5V 電流 - 輸入偏壓（最小值）:- 電流 - 輸出（標(biāo)準(zhǔn)）:0.015mA @ 5V 電流 - 靜態(tài)（最大值）:8.5µA CMRR, PSRR（標(biāo)準(zhǔn)）:80dB CMRR，80dB PSRR 傳輸延遲（最大）:12µs 磁滯:50mV 工作溫度:0°C ~ 70°C 封裝/外殼:16-DIP（0.300"，7.62mm） 安裝類型:通孔 包裝:管件 |
| LT1719CS8#TRPBF | 功能描述:IC COMP R-R I/O SGL 3/5V 8-SOIC RoHS:是 類別:集成電路 (IC) >> 線性 - 比較器 系列:UltraFast™ 標(biāo)準(zhǔn)包裝:25 系列:- 類型:帶電壓基準(zhǔn) 元件數(shù):4 輸出類型:CMOS，開(kāi)路漏極，TTL 電壓 - 電源，單路/雙路(±):2 V ~ 11 V，±1 V ~ 5.5 V 電壓 - 輸入偏移（最小值）:10mV @ 5V 電流 - 輸入偏壓（最小值）:- 電流 - 輸出（標(biāo)準(zhǔn)）:0.015mA @ 5V 電流 - 靜態(tài)（最大值）:8.5µA CMRR, PSRR（標(biāo)準(zhǔn)）:80dB CMRR，80dB PSRR 傳輸延遲（最大）:12µs 磁滯:50mV 工作溫度:0°C ~ 70°C 封裝/外殼:16-DIP（0.300"，7.62mm） 安裝類型:通孔 包裝:管件 |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。