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參數(shù)資料
| 型號： | LT1720 |
| 廠商： | Linear Technology Corporation |
| 英文描述： | Dual/Quad, 4.5ns, Single Supply 3V/5V Comparators with Rail-to-Rail Outputs |
| 中文描述： | 雙/四路，延遲時間為4.5ns，單電源3V/5V與鐵比較到軌輸出 |
| 文件頁數(shù)： | 8/28頁 |
| 文件大?。?/td> | 317K |
| 代理商： | LT1720 |
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8
LT1720/LT1721
APPLICATIO
S I
N
FOR
ATIO
U
However, with the 2V/ns slew rate of the LT1720/LT1721
outputs, a 4mV step can be created at a 100
input
source with only 0.02pF of output to input coupling. The
pinouts of the LT1720/LT1721 have been arranged to
minimize problems by placing the most sensitive inputs
(inverting) away from the outputs, shielded by the power
rails. The input and output traces of the circuit board
should also be separated, and the requisite level of
isolation is readily achieved if a topside ground plane runs
between the outputs and the inputs. For multilayer boards
where the ground plane is internal, a topside ground or
supply trace should be run between the inputs and
outputs, as illustrated in Figure 1.
W
U
Figure 2. Hysteresis I/O Characteristics
The supply bypass should include an adjacent
10nF ceramic capacitor and a 2.2
μ
F tantalum capacitor no
farther than 5cm away; use more capacitance if driving
more than 4mA loads. To prevent oscillations, it is helpful
to balance the impedance at the inverting and noninverting
inputs; source impedances should be kept low, preferably
1k
or less.
The outputs of the LT1720/LT1721 are capable of very
high slew rates. To prevent overshoot, ringing and other
problems with transmission line effects, keep the output
traces shorter than 10cm, or be sure to terminate the lines
to maintain signal integrity. The LT1720/LT1721 can drive
DC terminations of 250
or more, but lower characteristic
impedance traces can be driven with series termination or
AC termination topologies.
Hysteresis
The LT1720/LT1721 include internal hysteresis, which
makes them easier to use than many other comparable
speed comparators.
The input-output transfer characteristic is illustrated in
Figure 2 showing the definitions of V
OS
and V
HYST
based
upon the two measurable trip points. The hysteresis band
makes the LT1720/LT1721 well behaved, even with slowly
moving inputs.
V
HYST
(= V
TRIP+
– V
TRIP–
)
V
HYST
/2
V
OL
1720/21 F02
V
OH
V
TRIP–
V
TRIP+
V
IN
= V
IN+
– V
IN–
V
TRIP+
+ V
TRIP–
2
V
OS
=
V
O
0
Figure 1. Typical Topside Metal for Multilayer PCB Layouts
1720/21 F01
(b)
(a)
Figure 1a shows a typical topside layout of the LT1720 on
such a multilayer board. Shown is the topside metal etch
including traces, pin escape vias, and the land pads for an
SO-8 LT1720 and its adjacent X7R 10nF bypass capacitor
in a 1206 case.
The ground trace from Pin 5 runs under the device up to
the bypass capacitor, shielding the inputs from the
outputs. Note the use of a common via for the LT1720 and
the bypass capacitor, which minimizes interference from
high frequency energy running around the ground plane or
power distribution traces.
Figure 1b shows a typical topside layout of the LT1721 on
a multilayer board. In this case, the power and ground
traces have been extended to the bottom of the device
solely to act as high frequency shields between input and
output traces.
Although both V
CC
pins are electrically shorted internal to
the LT1721, they must be shorted together externally as
well in order for both to function as shields. The same is
true for the two GND pins.
相關PDF資料 |
PDF描述 |
|---|---|
| LT1721 | Dual/Quad, 4.5ns, Single Supply 3V/5V Comparators with Rail-to-Rail Outputs |
| LT1721CGN | Dual/Quad, 4.5ns, Single Supply 3V/5V Comparators with Rail-to-Rail Outputs |
| LT1720CS8 | Dual/Quad, 4.5ns, Single Supply 3V/5V Comparators with Rail-to-Rail Outputs |
| LT1720CMS8 | Dual/Quad, 4.5ns, Single Supply 3V/5V Comparators with Rail-to-Rail Outputs |
| LT1721IS | Dual/Quad, 4.5ns, Single Supply 3V/5V Comparators with Rail-to-Rail Outputs |
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|---|---|
| LT1720CDD | 功能描述:IC COMP R-R IN/OUT DUAL 8DFN RoHS:否 類別:集成電路 (IC) >> 線性 - 比較器 系列:UltraFast™ 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,500 系列:- 類型:通用 元件數(shù):1 輸出類型:CMOS，推挽式，滿擺幅，TTL 電壓 - 電源，單路/雙路(±):2.5 V ~ 5.5 V，±1.25 V ~ 2.75 V 電壓 - 輸入偏移（最小值）:5mV @ 5.5V 電流 - 輸入偏壓（最小值）:1pA @ 5.5V 電流 - 輸出（標準）:- 電流 - 靜態(tài)（最大值）:24µA CMRR, PSRR（標準）:80dB CMRR，80dB PSRR 傳輸延遲（最大）:450ns 磁滯:±3mV 工作溫度:-40°C ~ 85°C 封裝/外殼:6-WFBGA，CSPBGA 安裝類型:表面貼裝 包裝:管件 其它名稱:Q3554586 |
| LT1720CDD#PBF | 功能描述:IC COMP R-R IN/OUT DUAL 8DFN RoHS:是 類別:集成電路 (IC) >> 線性 - 比較器 系列:UltraFast™ 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,500 系列:- 類型:通用 元件數(shù):1 輸出類型:CMOS，推挽式，滿擺幅，TTL 電壓 - 電源，單路/雙路(±):2.5 V ~ 5.5 V，±1.25 V ~ 2.75 V 電壓 - 輸入偏移（最小值）:5mV @ 5.5V 電流 - 輸入偏壓（最小值）:1pA @ 5.5V 電流 - 輸出（標準）:- 電流 - 靜態(tài)（最大值）:24µA CMRR, PSRR（標準）:80dB CMRR，80dB PSRR 傳輸延遲（最大）:450ns 磁滯:±3mV 工作溫度:-40°C ~ 85°C 封裝/外殼:6-WFBGA，CSPBGA 安裝類型:表面貼裝 包裝:管件 其它名稱:Q3554586 |
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