參數(shù)資料
型號(hào)： LT1721CGN
廠商： LINEAR TECHNOLOGY CORP
元件分類： 運(yùn)動(dòng)控制電子
英文描述： Dual/Quad, 4.5ns, Single Supply 3V/5V Comparators with Rail-to-Rail Outputs
中文描述： QUAD COMPARATOR, 4500 uV OFFSET-MAX, 7 ns RESPONSE TIME, PDSO16
封裝： 0.150 INCH, PLASTIC, SSOP-16
文件頁(yè)數(shù)： 16/28頁(yè)
文件大?。?/td> 317K
代理商： LT1721CGN
16
LT1720/LT1721
APPLICATIO
S I
N
FOR
ATIO
U
Timing Skews
For a number of reasons, the LT1720/LT1721’s superior
timing specifications make them an excellent choice for
applications requiring accurate differential timing skew.
The comparators in a single package are inherently well
matched, with just 300ps
t
PD
typical. Monolithic con-
struction keeps the delays well matched vs supply voltage
and temperature. Crosstalk between the comparators,
usually a disadvantage in monolithic duals and quads, has
minimal effect on the LT1720/LT1721 timing due to the
internal hysteresis, as described in the Speed Limits
section.
The circuits of Figure 11 show basic building blocks for
differential timing skews. The 2.5k resistance interacts
with the 2pF typical input capacitance to create at least
±
4ns delay, controlled by the potentiometer setting.
A differential and a single-ended version are shown. In the
differential configuration, the output edges can be smoothly
scrolled through
t = 0 with negligible interaction.
W
U
Figure 11. Building Blocks for Timing Skew Generation with the LT1720
LT1720
DIFFERENTIAL
±
4ns
RELATIVE SKEW
C
IN
C
IN
C
IN
C
IN
V
REF
2.5k
2.5k
INPUT
LT1720
0ns TO 4ns
SINGLE-ENDED
DELAY
C
IN
C
IN
1720/21 F11
V
REF
INPUT
C
IN
C
IN
–
+
–
+
–
+
–
+
3ns Delay Detector
It is often necessary to measure comparative timing of
pulse edges in order to determine the true synchronicity of
clock and control signals, whether in digital circuitry or in
high speed instrumentation. The circuit in Figure12 is a
delay detector which will output a pulse when signals X
and Y are out of sync (specifically, when X is high and Y is
low). Note that the addition of an identical circuit to detect
the opposite situation (X low and Y high) allows for full
skew detection.
Comparators U1A and U1B clean up the incoming signals
and render the circuit less sensitive to input levels and
slew rates. The resistive divider network provides level
shifting for the downstream comparator’s common mode
input range, as well as offset to keep the output low except
during a decisive event. When the upstream comparator’s
outputs can overcome the resistively generated offset
(and hysteresis), comparator U1C performs a Boolean
“X*_Y” function and produces an output pulse (see Fig-
ure13). The circuit will give full output response with
input delays down to 3ns and partial output response with
input delays down to 1.8ns. Capacitor C1 helps ensure that
an imbalance of parasitic capacitances in the layout will
not cause common mode excursions to result in differen-
tial mode signal and false outputs.
1
1
Make sure the input levels at X and Y are not too close to the 0.5V threshold set by the R8–R9
divider. If you are still getting false outputs, try increasing C1 to 10pF or more. You can also look
for the problem in the impedance balance (R5 || R6 = R7) at the inputs of U1C. Increasing the offset
by lowering R5 will help reject false outputs, but R7 should also be lowered to maintain impedance
balance. For ease of design and parasitic matching, R7 can be replaced by two parallel resistors
equal to R5 and R6.
相關(guān)PDF資料
PDF描述
LT1720CS8 Dual/Quad, 4.5ns, Single Supply 3V/5V Comparators with Rail-to-Rail Outputs
LT1720CMS8 Dual/Quad, 4.5ns, Single Supply 3V/5V Comparators with Rail-to-Rail Outputs
LT1721IS Dual/Quad, 4.5ns, Single Supply 3V/5V Comparators with Rail-to-Rail Outputs
LT1722 Single, Dual, Quad 200MHz Low Noise Precision Op Amps
LT1723CMS8 Single, Dual, Quad 200MHz Low Noise Precision Op Amps
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
LT1721CGN#PBF 功能描述:IC COMP R-RINOUT QUAD 16-SSOP RoHS:是 類別:集成電路 (IC) >> 線性 - 比較器 系列:UltraFast™ 標(biāo)準(zhǔn)包裝:1 系列:- 類型:通用 元件數(shù):1 輸出類型:CMOS，開路集電極，TTL 電壓 - 電源，單路/雙路(±):2.7 V ~ 5.5 V 電壓 - 輸入偏移（最小值）:7mV @ 5V 電流 - 輸入偏壓（最小值）:0.25µA @ 5V 電流 - 輸出（標(biāo)準(zhǔn)）:84mA @ 5V 電流 - 靜態(tài)（最大值）:120µA CMRR, PSRR（標(biāo)準(zhǔn)）:- 傳輸延遲（最大）:600ns 磁滯:- 工作溫度:-40°C ~ 85°C 封裝/外殼:SC-74A，SOT-753 安裝類型:表面貼裝 包裝:剪切帶 (CT) 產(chǎn)品目錄頁(yè)面:1268 (CN2011-ZH PDF) 其它名稱:*LMV331M5*LMV331M5/NOPBLMV331M5CT
LT1721CGN#PBF 制造商:Linear Technology 功能描述:High Speed Comparator IC
LT1721CGN#TR 功能描述:IC COMP QUAD R-R 4.5NS 16SSOP RoHS:否 類別:集成電路 (IC) >> 線性 - 比較器 系列:UltraFast™ 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 類型:通用 元件數(shù):1 輸出類型:CMOS，推挽式，滿擺幅，TTL 電壓 - 電源，單路/雙路(±):2.5 V ~ 5.5 V，±1.25 V ~ 2.75 V 電壓 - 輸入偏移（最小值）:5mV @ 5.5V 電流 - 輸入偏壓（最小值）:1pA @ 5.5V 電流 - 輸出（標(biāo)準(zhǔn)）:- 電流 - 靜態(tài)（最大值）:24µA CMRR, PSRR（標(biāo)準(zhǔn)）:80dB CMRR，80dB PSRR 傳輸延遲（最大）:450ns 磁滯:±3mV 工作溫度:-40°C ~ 85°C 封裝/外殼:6-WFBGA，CSPBGA 安裝類型:表面貼裝 包裝:管件 其它名稱:Q3554586
LT1721CGN#TRPBF 功能描述:IC COMP R-RINOUT QUAD 16-SSOP RoHS:是 類別:集成電路 (IC) >> 線性 - 比較器 系列:UltraFast™ 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 類型:通用 元件數(shù):1 輸出類型:CMOS，推挽式，滿擺幅，TTL 電壓 - 電源，單路/雙路(±):2.5 V ~ 5.5 V，±1.25 V ~ 2.75 V 電壓 - 輸入偏移（最小值）:5mV @ 5.5V 電流 - 輸入偏壓（最小值）:1pA @ 5.5V 電流 - 輸出（標(biāo)準(zhǔn)）:- 電流 - 靜態(tài)（最大值）:24µA CMRR, PSRR（標(biāo)準(zhǔn)）:80dB CMRR，80dB PSRR 傳輸延遲（最大）:450ns 磁滯:±3mV 工作溫度:-40°C ~ 85°C 封裝/外殼:6-WFBGA，CSPBGA 安裝類型:表面貼裝 包裝:管件 其它名稱:Q3554586
LT1721CS 功能描述:IC COMP R-RINOUT QUAD 16-SOIC RoHS:否 類別:集成電路 (IC) >> 線性 - 比較器 系列:UltraFast™ 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 類型:通用 元件數(shù):1 輸出類型:CMOS，推挽式，滿擺幅，TTL 電壓 - 電源，單路/雙路(±):2.5 V ~ 5.5 V，±1.25 V ~ 2.75 V 電壓 - 輸入偏移（最小值）:5mV @ 5.5V 電流 - 輸入偏壓（最小值）:1pA @ 5.5V 電流 - 輸出（標(biāo)準(zhǔn)）:- 電流 - 靜態(tài)（最大值）:24µA CMRR, PSRR（標(biāo)準(zhǔn)）:80dB CMRR，80dB PSRR 傳輸延遲（最大）:450ns 磁滯:±3mV 工作溫度:-40°C ~ 85°C 封裝/外殼:6-WFBGA，CSPBGA 安裝類型:表面貼裝 包裝:管件 其它名稱:Q3554586
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