參數(shù)資料
型號(hào)： LT1789IS8-1#PBF
廠商： Linear Technology
文件頁(yè)數(shù)： 11/24頁(yè)
文件大小： 0K
描述： IC INSTRUMENT AMP R-R OUT 8-SOIC
標(biāo)準(zhǔn)包裝： 100
放大器類(lèi)型： 儀表
電路數(shù)： 1
轉(zhuǎn)換速率： 0.026 V/µs
增益帶寬積： 60kHz
電流 - 輸入偏壓： 17nA
電壓 - 輸入偏移： 30µV
電流 - 電源： 85µA
電流 - 輸出 / 通道： 8.5mA
電壓 - 電源，單路/雙路(±)： 2.2 V ~ 36 V，±1.1 V ~ 18 V
工作溫度： -40°C ~ 85°C
安裝類(lèi)型： 表面貼裝
封裝/外殼： 8-SOIC（0.154"，3.90mm 寬）
供應(yīng)商設(shè)備封裝： 8-SO
包裝： 管件
產(chǎn)品目錄頁(yè)面： 1323 (CN2011-ZH PDF)
LT1789-1/LT1789-10
19
1789fc
APPLICATIONS INFORMATION
Figure 2. Optional Trimming of Output Offset Voltage
–
+
10k
100Ω
–10mV
1789 F02
V–
V+
10mV
5
6
OUTPUT
2
3
1
LT1880
±10mV
ADJUSTMENT RANGE
–
+
2
–IN
+IN
1
8
3
RG
REF
LT1789-1/-10
Reference Terminal
The output voltage of the LT1789-1/LT1789-10 (Pin 6)
is referenced to the voltage on the reference terminal
(Pin 5). Resistance in series with the REF pin must be
minimized for best common mode rejection. For example,
a 22Ω resistance from the REF pin to ground will not
only increase the gain error by 0.02% but will lower the
CMRR to 80dB.
Output Offset Trimming
The LT1789-1/LT1789-10 is laser trimmed for low offset
voltage so that no external offset trimming is required for
most applications. In the event that the offset needs to be
adjusted, the circuit in Figure 2 is an example of an optional
offset adjust circuit. The op amp buffer provides a low
impedance to the REF pin where resistance must be kept
to a minimum for best CMRR and lowest gain error.
Input Bias Current Return Path
The low input bias current of the LT1789-1/LT1789-10
(19nA) and the high input impedance (1.6GΩ) allow the
use of high impedance sources without introducing sig-
nificant offset voltage errors, even when the full common
mode range is required. However, a path must be provided
for the input bias currents of both inputs when a purely
differential signal is being amplified. Without this path the
inputs will float high and exceed the input common mode
range of the LT1789-1/LT1789-10, resulting in a saturated
input stage. Figure 3 shows three examples of an input bias
current path. The first example is of a purely differential
signal source with a 10kΩ input current path to ground.
Since the impedance of the signal source is low, only one
resistor is needed. Two matching resistors are needed for
higher impedance signal sources as shown in the second
example. Balancing the input impedance improves both
common mode rejection and DC offset. The need for input
resistors is eliminated if a center tap is present as shown
in the third example.
Figure 3. Providing an Input Common Mode Current Path
10k
RG
1789 F03
THERMOCOUPLE
200k
MICROPHONE,
HYDROPHONE,
ETC
200k
CENTER-TAP PROVIDES
BIAS CURRENT RETURN
–
+
LT1789-1/
LT1789-10
–
+
LT1789-1/
LT1789-10
–
+
LT1789-1/
LT1789-10
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