HARA TERISTICS The q denotes specificati" />
參數(shù)資料
型號: LT1793AIN8#PBF
廠商: Linear Technology
文件頁數(shù): 7/12頁
文件大?。?/td> 0K
描述: IC OPAMP PREC JFET LOWNOISE 8DIP
標(biāo)準(zhǔn)包裝: 50
放大器類型: J-FET
電路數(shù): 1
轉(zhuǎn)換速率: 3.4 V/µs
增益帶寬積: 4.2MHz
電流 - 輸入偏壓: 3pA
電壓 - 輸入偏移: 250µV
電流 - 電源: 4.2mA
電壓 - 電源,單路/雙路(±): ±4.5 V ~ 20 V
工作溫度: -40°C ~ 85°C
安裝類型: 通孔
封裝/外殼: 8-DIP(0.300",7.62mm)
供應(yīng)商設(shè)備封裝: 8-PDIP
包裝: 管件
4
LT1793
ELECTRICAL C
C
HARA TERISTICS The q denotes specifications which apply over the temperature range
–40
°C ≤ TA ≤ 85°C. VS = ±15V, VCM = 0V, unless otherwise noted. (Notes 8, 9)
SYMBOL
PARAMETER
CONDITIONS (Note 2)
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
VOS
Input Offset Voltage
q
0.65
1.3
1.6
4.8
mV
VS = ±5V
q
1.00
1.9
2.0
5.5
mV
VOS
Average Input Offset
(Note 6)
q
513
9
50
V/°C
Temp
Voltage Drift
IOS
Input Offset Current
q
80
300
100
400
pA
IB
Input Bias Current
q
700
2400
800
3000
pA
VCM
Input Voltage Range (Note 5)
q
12.6
13.0
12.6
13.0
V
q
– 10.0
– 10.5
– 10.0
– 10.5
V
CMRR
Common Mode Rejection Ratio
VCM = –10V to 12.6V
q
78
99
76
94
dB
PSRR
Power Supply Rejection Ratio
VS = ±4.5V to ± 20V
q
81
96
79
93
dB
AVOL
Large-Signal Voltage Gain
VO = ±12V, RL = 10k
q
850
3300
750
3000
V/mV
VO = ±10V, RL = 1k
q
400
2200
300
2000
V/mV
VOUT
Output Voltage Swing
RL = 10k
q
±12.8 ±13.1
V
RL = 1k
q
±11.8 ±12.1
V
SR
Slew Rate
RL ≥ 2k
q
2.1
3.2
2.1
3.2
V/
s
GBW
Gain-Bandwidth Product
fO = 100kHz
q
23.1
MHz
IS
Supply Current
q
4.2
5.40
4.2
5.40
mA
VS = ±5V
q
4.2
5.35
4.2
5.35
mA
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: Typical parameters are defined as the 60% yield of parameter
distributions of individual amplifiers.
Note 3: IB and IOS readings are extrapolated to a warmed-up temperature
from 25
°C measurements and 32°C characterization data.
Note 4: Current noise is calculated from the formula:
in = (2qIB)1/2
where q = 1.6 10 –19 coulomb. The noise of source resistors up to 200M
swamps the contribution of current noise.
Note 5: Input voltage range functionality is assured by testing offset
voltage at the input voltage range limits to a maximum of 2.3mV
(A grade) to 2.8mV (C grade).
Note 6: This parameter is not 100% tested.
Note 7: Slew rate is measured in AV = –1; input signal is ±7.5V, output
measured at
±2.5V.
Note 8: The LT1793AC and LT1793C are guaranteed to meet specified
performance from 0
°C to 70°C and are designed, characterized and
expected to meet these extended temperature limits, but are not tested at
–40
°C and 85°C. The LT1793I is guaranteed to meet the extended
temperature limits. The LT1793AC and LT1793AI grade are 100%
temperature tested for the specified temperature range.
Note 9: The LT1793 is measured in an automated tester in less than one
second after application of power. Depending on the package used, power
dissipation, heat sinking, and air flow conditions, the fully warmed-up chip
temperature can be 10
°C to 50°C higher than the ambient temperature.
LT1793AC/LT1793AI
LT1793C/LT1793I
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