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| 型號： | LT1882HS#PBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 6/18頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC OPAMP QUAD R-R PICO/IN 14SOIC |
| 標(biāo)準(zhǔn)包裝： | 55 |
| 放大器類型： | 通用 |
| 電路數(shù)： | 4 |
| 輸出類型： | 滿擺幅 |
| 轉(zhuǎn)換速率： | 0.4 V/µs |
| 增益帶寬積： | 1MHz |
| 電流 - 輸入偏壓： | 150pA |
| 電壓 - 輸入偏移： | 30µV |
| 電流 - 電源： | 850µA |
| 電流 - 輸出 / 通道： | 40mA |
| 電壓 - 電源，單路/雙路(±)： | 2.7 V ~ 36 V，±1.35 V ~ 18 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 14-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 14-SO |
| 包裝： | 管件 |
LT1881/LT1882
14
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The LT1881 dual and LT1882 quad op amps feature
exceptional input precision with rail-to-rail output swing.
The ampliers are similar to the LT1884 and LT1885
devices. The LT1881 and LT1882 offer superior capacitive
load driving capabilities over the LT1884 and LT1885 in low
voltage gain congurations. Offset voltages are trimmed to
less than 50μV and input bias currents are less than 200pA
on the “A” grade devices. Obtaining benecial advantage of
these precision input characteristics depends upon proper
applications circuit design and board layout.
Preserving Input Precision
Preserving the input voltage accuracy of the LT1881/LT1882
requires that the applications circuit and PC board layout
do not introduce errors comparable to or greater than the
30μV offset. Temperature differentials across the input
connections can generate thermocouple voltages of 10’s
of microvolts. PC board layouts should keep connections
to the amplier’s input pins close together and away from
heat dissipating components. Air currents across the board
can also generate temperature differentials.
The extremely low input bias currents, 150pA, allow high
accuracy to be maintained with high impedance sources
and feedback networks. The LT1881/LT1882’s low input
bias currents are obtained by using a cancellation circuit
on-chip. This causes the resulting IBIAS+ and IBIAS– to
be uncorrelated, as implied by the IOS specication being
greater than the IBIAS. The user should not try to balance
the input resistances in each input lead, as is commonly
recommended with most ampliers. The impedance at
either input should be kept as small as possible to minimize
total circuit error.
PC board layout is important to insure that leakage currents
do not corrupt the low IBIAS of the amplier. In high
precision, high impedance circuits, the input pins should
be surrounded by a guard ring of PC board interconnect,
with the guard driven to the same common mode voltage
as the amplier inputs.
Input Common Mode Range
The LT1881 and LT1882 outputs are able to swing nearly
to each power supply rail, but the input stage is limited
to operating between V– +1V and V+ –1V. Exceeding this
common mode range will cause the gain to drop to zero;
however, no phase reversal will occur.
Input Protection
The inverting and noninverting input pins of the LT1881
and LT1882 have limited on-chip protection. ESD protection
is provided to prevent damage during handling. The input
transistors have voltage clamping and limiting resistors
to protect against input differentials up to 10V. Short
transients above this level will also be tolerated. If the
input pins can see a sustained differential voltage above
10V, external limiting resistors should be used to prevent
damage to the amplier. A 1k resistor in each input lead
will provide protection against a 30V differential voltage.
Capacitive Loads
The LT1881 and LT1882 can drive capacitive loads up to
1000pF in unity-gain. The capacitive load driving increases
as the amplier is used in higher gain congurations.
Capacitive load driving may be increased by decoupling
the capacitance from the output with a small resistance.
APPLICATIONS INFORMATION
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