
6
LT1933
1933f
APPLICATIU
FB Resistor Network
The output voltage is programmed with a resistor divider
between the output and the FB pin. Choose the 1%
resistors according to:
R1 = R2(V
OUT
/1.245 – 1)
R2 should be 20k or less to avoid bias current errors.
Reference designators refer to the Block Diagram.
W
U
U
Input Voltage Range
The input voltage range for LT1933 applications depends
on the output voltage and on the absolute maximum
ratings of the V
IN
and BOOST pins.
The minimum input voltage is determined by either the
LT1933’s minimum operating voltage of ~3.35V, or by its
maximum duty cycle. The duty cycle is the fraction of time
that the internal switch is on and is determined by the input
and output voltages:
DC = (V
OUT
+ V
D
)/(V
IN
– V
SW
+ V
D
)
where V
D
is the forward voltage drop of the catch diode
(~0.4V) and V
SW
is the voltage drop of the internal switch
(~0.4V at maximum load). This leads to a minimum input
voltage of:
V
IN(MIN)
= (V
OUT
+ V
D
)/DC
MAX
– V
D
+ V
SW
with DC
MAX
= 0.88
The maximum input voltage is determined by the absolute
maximum ratings of the V
IN
and BOOST pins and by the
minimum duty cycle DC
MIN
= 0.08 (corresponding to a
minimum on time of 130ns):
V
IN(MAX)
= (V
OUT
+ V
D
)/DC
MIN
– V
D
+ V
SW
Note that this is a restriction on the operating input
voltage; the circuit will tolerate transient inputs up to the
absolute maximum ratings of the V
IN
and BOOST pins.
Inductor Selection and Maximum Output Current
A good first choice for the inductor value is:
L = 5 (V
OUT
+ V
D
)
where V
D
is the voltage drop of the catch diode (~0.4V) and
L is in
μ
H. With this value the maximum load current will
be above 500mA. The inductor’s RMS current rating must
be greater than your maximum load current and its satu-
ration current should be about 30% higher. For robust
operation in fault conditions the saturation current should
OPERATIOU
The LT1933 is a constant frequency, current mode step
down regulator. A 500kHz oscillator enables an RS flip-
flop, turning on the internal 750mA power switch Q1. An
amplifier and comparator monitor the current flowing
between the V
IN
and SW pins, turning the switch off when
this current reaches a level determined by the voltage at
V
C
. An error amplifier measures the output voltage through
an external resistor divider tied to the FB pin and servos the
V
C
node. If the error amplifier’s output increases, more
current is delivered to the output; if it decreases, less
current is delivered. An active clamp (not shown) on the V
C
node provides current limit. The V
C
node is also clamped
to the voltage on the SHDN pin; soft-start is implemented
by generating a voltage ramp at the SHDN pin using an
external resistor and capacitor.
An internal regulator provides power to the control cir-
cuitry. This regulator includes an undervoltage lockout to
prevent switching when V
IN
is less than ~3.35V. The SHDN
pin is used to place the LT1933 in shutdown, disconnect-
ing the output and reducing the input current to less than
2
μ
A.
The switch driver operates from either the input or from
the BOOST pin. An external capacitor and diode are used
to generate a voltage at the BOOST pin that is higher than
the input supply. This allows the driver to fully saturate the
internal bipolar NPN power switch for efficient operation.
The oscillator reduces the LT1933’s operating frequency
when the voltage at the FB pin is low. This frequency
foldback helps to control the output current during startup
and overload.
(Refer to Block Diagram)